1 | /* Blackfin UART Registers |
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2 | * |
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3 | * Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA |
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4 | * written by Allan Hessenflow <allanh@kallisti.com> |
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5 | * |
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6 | * The license and distribution terms for this file may be |
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7 | * found in the file LICENSE in this distribution or at |
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8 | * http://www.rtems.org/license/LICENSE. |
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9 | */ |
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10 | |
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11 | #ifndef _uartRegs_h_ |
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12 | #define _uartRegs_h_ |
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13 | |
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14 | /* register addresses */ |
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15 | |
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16 | #define UART_RBR_OFFSET 0x0000 |
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17 | #define UART_THR_OFFSET 0x0000 |
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18 | #define UART_DLL_OFFSET 0x0000 |
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19 | #define UART_IER_OFFSET 0x0004 |
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20 | #define UART_DLH_OFFSET 0x0004 |
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21 | #define UART_IIR_OFFSET 0x0008 |
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22 | #define UART_LCR_OFFSET 0x000c |
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23 | #define UART_MCR_OFFSET 0x0010 |
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24 | #define UART_LSR_OFFSET 0x0014 |
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25 | #define UART_SCR_OFFSET 0x001c |
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26 | #define UART_GCTL_OFFSET 0x0024 |
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27 | |
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28 | |
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29 | /* register fields */ |
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30 | |
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31 | #define UART_LCR_DLAB 0x80 |
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32 | #define UART_LCR_SB 0x40 |
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33 | #define UART_LCR_STP 0x20 |
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34 | #define UART_LCR_EPS 0x10 |
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35 | #define UART_LCR_PEN 0x08 |
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36 | #define UART_LCR_STB 0x04 |
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37 | #define UART_LCR_WLS_MASK 0x03 |
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38 | #define UART_LCR_WLS_5 0x00 |
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39 | #define UART_LCR_WLS_6 0x01 |
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40 | #define UART_LCR_WLS_7 0x02 |
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41 | #define UART_LCR_WLS_8 0x03 |
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42 | |
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43 | #define UART_MCR_LOOP 0x10 |
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44 | |
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45 | #define UART_LSR_TEMT 0x40 |
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46 | #define UART_LSR_THRE 0x20 |
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47 | #define UART_LSR_BI 0x10 |
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48 | #define UART_LSR_FE 0x08 |
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49 | #define UART_LSR_PE 0x04 |
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50 | #define UART_LSR_OE 0x02 |
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51 | #define UART_LSR_DR 0x01 |
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52 | |
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53 | #define UART_IER_ELSI 0x04 |
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54 | #define UART_IER_ETBEI 0x02 |
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55 | #define UART_IER_ERBFI 0x01 |
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56 | |
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57 | #define UART_IIR_STATUS_MASK 0x06 |
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58 | #define UART_IIR_STATUS_THRE 0x02 |
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59 | #define UART_IIR_STATUS_RDR 0x04 |
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60 | #define UART_IIR_STATUS_LS 0x06 |
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61 | #define UART_IIR_NINT 0x01 |
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62 | |
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63 | #define UART_GCTL_FFE 0x20 |
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64 | #define UART_GCTL_FPE 0x10 |
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65 | #define UART_GCTL_RPOLC 0x08 |
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66 | #define UART_GCTL_TPOLC 0x04 |
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67 | #define UART_GCTL_IREN 0x02 |
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68 | #define UART_GCTL_UCEN 0x01 |
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69 | |
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70 | #endif /* _uartRegs_h_ */ |
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