source: rtems/bsps/bfin/include/libcpu/uartRegs.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on 12/23/17 at 07:18:56

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*  Blackfin UART Registers
2 *
3 *  Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA
4 *             written by Allan Hessenflow <allanh@kallisti.com>
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.rtems.org/license/LICENSE.
9 */
10
11#ifndef _uartRegs_h_
12#define _uartRegs_h_
13
14/* register addresses */
15
16#define UART_RBR_OFFSET                               0x0000
17#define UART_THR_OFFSET                               0x0000
18#define UART_DLL_OFFSET                               0x0000
19#define UART_IER_OFFSET                               0x0004
20#define UART_DLH_OFFSET                               0x0004
21#define UART_IIR_OFFSET                               0x0008
22#define UART_LCR_OFFSET                               0x000c
23#define UART_MCR_OFFSET                               0x0010
24#define UART_LSR_OFFSET                               0x0014
25#define UART_SCR_OFFSET                               0x001c
26#define UART_GCTL_OFFSET                              0x0024
27
28
29/* register fields */
30
31#define UART_LCR_DLAB                                   0x80
32#define UART_LCR_SB                                     0x40
33#define UART_LCR_STP                                    0x20
34#define UART_LCR_EPS                                    0x10
35#define UART_LCR_PEN                                    0x08
36#define UART_LCR_STB                                    0x04
37#define UART_LCR_WLS_MASK                               0x03
38#define UART_LCR_WLS_5                                  0x00
39#define UART_LCR_WLS_6                                  0x01
40#define UART_LCR_WLS_7                                  0x02
41#define UART_LCR_WLS_8                                  0x03
42
43#define UART_MCR_LOOP                                   0x10
44
45#define UART_LSR_TEMT                                   0x40
46#define UART_LSR_THRE                                   0x20
47#define UART_LSR_BI                                     0x10
48#define UART_LSR_FE                                     0x08
49#define UART_LSR_PE                                     0x04
50#define UART_LSR_OE                                     0x02
51#define UART_LSR_DR                                     0x01
52
53#define UART_IER_ELSI                                   0x04
54#define UART_IER_ETBEI                                  0x02
55#define UART_IER_ERBFI                                  0x01
56
57#define UART_IIR_STATUS_MASK                            0x06
58#define UART_IIR_STATUS_THRE                            0x02
59#define UART_IIR_STATUS_RDR                             0x04
60#define UART_IIR_STATUS_LS                              0x06
61#define UART_IIR_NINT                                   0x01
62
63#define UART_GCTL_FFE                                   0x20
64#define UART_GCTL_FPE                                   0x10
65#define UART_GCTL_RPOLC                                 0x08
66#define UART_GCTL_TPOLC                                 0x04
67#define UART_GCTL_IREN                                  0x02
68#define UART_GCTL_UCEN                                  0x01
69
70#endif /* _uartRegs_h_ */
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