source: rtems/bsps/arm/xilinx-zynq/start/bspstarthooks.c

Last change on this file was 49720a90, checked in by Sebastian Huber <sebastian.huber@…>, on 05/23/23 at 14:09:08

arm/xilinx-zynq: Improve Doxygen file comments

  • Property mode set to 100644
File size: 2.1 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/**
4 * @file
5 *
6 * @ingroup RTEMSBSPsARMZynq
7 *
8 * @brief This source file contains the implementation of bsp_start_hook_0()
9 *   and bsp_start_hook_1().
10 */
11
12/*
13 * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 *    notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 *    notice, this list of conditions and the following disclaimer in the
22 *    documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
38
39#include <bsp.h>
40#include <bsp/start.h>
41#include <bsp/arm-a9mpcore-start.h>
42
43BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
44{
45  arm_a9mpcore_start_hook_0();
46}
47
48BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
49{
50  arm_a9mpcore_start_hook_1();
51  bsp_start_copy_sections();
52  zynq_setup_mmu_and_cache();
53
54#if !defined(RTEMS_SMP) \
55  && (defined(BSP_DATA_CACHE_ENABLED) \
56    || defined(BSP_INSTRUCTION_CACHE_ENABLED))
57  /* Enable unified L2 cache */
58  rtems_cache_enable_data();
59#endif
60
61  bsp_start_clear_bss();
62}
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