source: rtems/bsps/arm/xilinx-zynq/include/bsp/irq.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 2.6 KB
Line 
1/**
2 * @file
3 * @ingroup zynq_interrupt
4 * @brief Interrupt definitions.
5 */
6
7/*
8 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
9 *
10 *  embedded brains GmbH
11 *  Dornierstr. 4
12 *  82178 Puchheim
13 *  Germany
14 *  <info@embedded-brains.de>
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.org/license/LICENSE.
19 */
20
21#ifndef LIBBSP_ARM_XILINX_ZYNQ_IRQ_H
22#define LIBBSP_ARM_XILINX_ZYNQ_IRQ_H
23
24#ifndef ASM
25
26#include <rtems/irq.h>
27#include <rtems/irq-extension.h>
28
29#include <bsp/arm-a9mpcore-irq.h>
30#include <bsp/arm-gic-irq.h>
31
32#ifdef __cplusplus
33extern "C" {
34#endif /* __cplusplus */
35
36/**
37 * @defgroup zynq_interrupt Interrupt Support
38 * @ingroup arm_zynq
39 * @brief Interrupt Support
40 * @{
41 */
42
43#define ZYNQ_IRQ_CPU_0 32
44#define ZYNQ_IRQ_CPU_1 33
45#define ZYNQ_IRQ_L2_CACHE 34
46#define ZYNQ_IRQ_OCM 35
47#define ZYNQ_IRQ_PMU_0 37
48#define ZYNQ_IRQ_PMU_1 38
49#define ZYNQ_IRQ_XADC 39
50#define ZYNQ_IRQ_DVI 40
51#define ZYNQ_IRQ_SWDT 41
52#define ZYNQ_IRQ_TTC_0_0 42
53#define ZYNQ_IRQ_TTC_1_0 43
54#define ZYNQ_IRQ_TTC_2_0 44
55#define ZYNQ_IRQ_DMAC_ABORT 45
56#define ZYNQ_IRQ_DMAC_0 46
57#define ZYNQ_IRQ_DMAC_1 47
58#define ZYNQ_IRQ_DMAC_2 48
59#define ZYNQ_IRQ_DMAC_3 49
60#define ZYNQ_IRQ_SMC 50
61#define ZYNQ_IRQ_QUAD_SPI 51
62#define ZYNQ_IRQ_GPIO 52
63#define ZYNQ_IRQ_USB_0 53
64#define ZYNQ_IRQ_ETHERNET_0 54
65#define ZYNQ_IRQ_ETHERNET_0_WAKEUP 55
66#define ZYNQ_IRQ_SDIO_0 56
67#define ZYNQ_IRQ_I2C_0 57
68#define ZYNQ_IRQ_SPI_0 58
69#define ZYNQ_IRQ_UART_0 59
70#define ZYNQ_IRQ_CAN_0 60
71#define ZYNQ_IRQ_FPGA_0 61
72#define ZYNQ_IRQ_FPGA_1 62
73#define ZYNQ_IRQ_FPGA_2 63
74#define ZYNQ_IRQ_FPGA_3 64
75#define ZYNQ_IRQ_FPGA_4 65
76#define ZYNQ_IRQ_FPGA_5 66
77#define ZYNQ_IRQ_FPGA_6 67
78#define ZYNQ_IRQ_FPGA_7 68
79#define ZYNQ_IRQ_TTC_0_1 69
80#define ZYNQ_IRQ_TTC_1_1 70
81#define ZYNQ_IRQ_TTC_2_1 71
82#define ZYNQ_IRQ_DMAC_4 72
83#define ZYNQ_IRQ_DMAC_5 73
84#define ZYNQ_IRQ_DMAC_6 74
85#define ZYNQ_IRQ_DMAC_7 75
86#define ZYNQ_IRQ_USB_1 76
87#define ZYNQ_IRQ_ETHERNET_1 77
88#define ZYNQ_IRQ_ETHERNET_1_WAKEUP 78
89#define ZYNQ_IRQ_SDIO_1 79
90#define ZYNQ_IRQ_I2C_1 80
91#define ZYNQ_IRQ_SPI_1 81
92#define ZYNQ_IRQ_UART_1 82
93#define ZYNQ_IRQ_CAN_1 83
94#define ZYNQ_IRQ_FPGA_8 84
95#define ZYNQ_IRQ_FPGA_9 85
96#define ZYNQ_IRQ_FPGA_10 86
97#define ZYNQ_IRQ_FPGA_11 87
98#define ZYNQ_IRQ_FPGA_12 88
99#define ZYNQ_IRQ_FPGA_13 89
100#define ZYNQ_IRQ_FPGA_14 90
101#define ZYNQ_IRQ_FPGA_15 91
102#define ZYNQ_IRQ_PARITY 92
103
104#define BSP_INTERRUPT_VECTOR_MIN 0
105#define BSP_INTERRUPT_VECTOR_MAX 92
106
107/** @} */
108
109#ifdef __cplusplus
110}
111#endif /* __cplusplus */
112
113#endif /* ASM */
114
115#endif /* LIBBSP_ARM_XILINX_ZYNQ_IRQ_H */
Note: See TracBrowser for help on using the repository browser.