source: rtems/bsps/arm/tms570/include/bsp/irq.h @ 5cc1695

Last change on this file since 5cc1695 was 5cc1695, checked in by Robin Mueller <robin.mueller.m@…>, on 04/19/21 at 08:55:33

Fixes for TMS570 BSP

When compiling the lwIP port for the TMS570, there
were issues with the BSP. Headers are expected in a folder
named ti_herc which did not exist. This fixes the issue.

Furthermore, there were multiple warnings about define redefinitions.
This was fixed as well.

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup RTEMSBSPsARMTMS570
5 *
6 * @brief TMS570 interrupt definitions.
7 */
8
9/*
10 * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
11 *
12 * Google Summer of Code 2014 at
13 * Czech Technical University in Prague
14 * Zikova 1903/4
15 * 166 36 Praha 6
16 * Czech Republic
17 *
18 * Based on LPC24xx and LPC1768 BSP
19 * by embedded brains GmbH and others
20 *
21 * The license and distribution terms for this file may be
22 * found in the file LICENSE in this distribution or at
23 * http://www.rtems.org/license/LICENSE.
24 */
25
26#ifndef LIBBSP_ARM_TMS570_IRQ_H
27#define LIBBSP_ARM_TMS570_IRQ_H
28
29#ifndef ASM
30#include <rtems.h>
31#include <rtems/irq.h>
32#include <rtems/irq-extension.h>
33#endif
34
35#define TMS570_IRQ_ESM_HIGH 0
36#define TMS570_IRQ_RESERVED_0 1
37#define TMS570_IRQ_TIMER_0 2
38#define TMS570_IRQ_TIMER_1 3
39#define TMS570_IRQ_TIMER_2 4
40#define TMS570_IRQ_TIMER_3 5
41#define TMS570_IRQ_RTI_OVERFLOW_0 6
42#define TMS570_IRQ_RTI_OVERFLOW_1 7
43#define TMS570_IRQ_RTI_TIMEBASE 8
44#define TMS570_IRQ_GIO_HIGH 9
45#define TMS570_IRQ_HET_HIGH 10
46#define TMS570_IRQ_HET_TU_HIGH 11
47#define TMS570_IRQ_MIBSPI1_HIGH 12
48#define TMS570_IRQ_SCI_LEVEL_0 13
49#define TMS570_IRQ_ADC1_EVENT 14
50#define TMS570_IRQ_ADC1_GROUP_1 15
51#define TMS570_IRQ_CAN1_HIGH 16
52#define TMS570_IRQ_RESERVED_1 17
53#define TMS570_IRQ_FLEXRAY_HIGH 18
54#define TMS570_IRQ_CRC_1 19
55#define TMS570_IRQ_ESM_LOW 20
56#define TMS570_IRQ_SSI 21
57#define TMS570_IRQ_PMU 22
58#define TMS570_IRQ_GIO_LOW 23
59#define TMS570_IRQ_HET_LOW 24
60#define TMS570_IRQ_HET_TU_LOW 25
61#define TMS570_IRQ_MIBSPI1_LOW 26
62#define TMS570_IRQ_SCI_LEVEL_1 27
63#define TMS570_IRQ_ADC1_GROUP_2 28
64#define TMS570_IRQ_CAN1_LOW 29
65#define TMS570_IRQ_RESERVED_2 30
66#define TMS570_IRQ_ADC1_MAG 31
67#define TMS570_IRQ_FLEXRAY_LOW 32
68#define TMS570_IRQ_DMA_FTCA 33
69#define TMS570_IRQ_DMA_LFSA 34
70#define TMS570_IRQ_CAN2_HIGH 35
71#define TMS570_IRQ_DMM_HIGH 36
72#define TMS570_IRQ_MIBSPI3_HIGH 37
73#define TMS570_IRQ_MIBSPI3_LOW 38
74#define TMS570_IRQ_DMA_HBCA 39
75#define TMS570_IRQ_DMA_BTCA 40
76#define TMS570_IRQ_DMA_BERA 41
77#define TMS570_IRQ_CAN2_LOW 42
78#define TMS570_IRQ_DMM_LOW 43
79#define TMS570_IRQ_CAN1_IF3 44
80#define TMS570_IRQ_CAN3_HIGH 45
81#define TMS570_IRQ_CAN2_IF3 46
82#define TMS570_IRQ_FPU 47
83#define TMS570_IRQ_FLEXRAY_TU 48
84#define TMS570_IRQ_SPI4_HIGH 49
85#define TMS570_IRQ_ADC2_EVENT 50
86#define TMS570_IRQ_ADC2_GROUP_1 51
87#define TMS570_IRQ_FLEXRAY_T0C 52
88#define TMS570_IRQ_MIBSPIP5_HIGH 53
89#define TMS570_IRQ_SPI4_LOW 54
90#define TMS570_IRQ_CAN3_LOW 55
91#define TMS570_IRQ_MIBSPIP5_LOW 56
92#define TMS570_IRQ_ADC2_GROUP_2 57
93#define TMS570_IRQ_FLEXRAY_TU_ERROR 58
94#define TMS570_IRQ_ADC2_MAG 59
95#define TMS570_IRQ_CAN3_IF3 60
96#define TMS570_IRQ_FSM_DONE 61
97#define TMS570_IRQ_FLEXRAY_T1C 62
98#define TMS570_IRQ_HET2_LEVEL_0 63
99#define TMS570_IRQ_SCI2_LEVEL_0 64
100#define TMS570_IRQ_HET_TU2_LEVEL_0 65
101#define TMS570_IRQ_IC2_INTERRUPT 66
102#define TMS570_IRQ_HET2_LEVEL_1 73
103#define TMS570_IRQ_SCI2_LEVEL_1 74
104#define TMS570_IRQ_HET_TU2_LEVEL_1 75
105#define TMS570_IRQ_EMAC_MISC 76
106#define TMS570_IRQ_EMAC_TX   77
107#define TMS570_IRQ_EMAC_THRESH 78
108#define TMS570_IRQ_EMAC_RX   79
109#define TMS570_IRQ_HWA_INT_REQ_H 80
110#define TMS570_IRQ_HWA_INT_REQ_H 81
111#define TMS570_IRQ_DCC_DONE_INTERRUPT 82
112#define TMS570_IRQ_DCC2_DONE_INTERRUPT 83
113#define TMS570_IRQ_HWAG1_INT_REQ_L 88
114#define TMS570_IRQ_HWAG2_INT_REQ_L 89
115#define BSP_INTERRUPT_VECTOR_COUNT 95
116
117#define TMS570_IRQ_PRIORITY_VALUE_MIN 0U
118#define TMS570_IRQ_PRIORITY_VALUE_MAX 0U
119
120#define TMS570_IRQ_PRIORITY_COUNT ( TMS570_IRQ_PRIORITY_VALUE_MAX + 1U )
121#define TMS570_IRQ_PRIORITY_HIGHEST TMS570_IRQ_PRIORITY_VALUE_MIN
122#define TMS570_IRQ_PRIORITY_LOWEST TMS570_IRQ_PRIORITY_VALUE_MAX
123
124#ifndef ASM
125
126/**
127 * @brief Set priority of the interrupt vector.
128 *
129 * This function is here because of compability. It should set
130 * priority of the interrupt vector.
131 * @warning It does not set any priority at HW layer. It is nearly imposible to
132 * @warning set priority of the interrupt on TMS570 in a nice way.
133 * @param[in] vector vector of isr
134 * @param[in] priority new priority assigned to the vector
135 * @return Void
136 */
137void tms570_irq_set_priority(
138  rtems_vector_number vector,
139  unsigned            priority
140);
141
142/**
143 * @brief Gets priority of the interrupt vector.
144 *
145 * This function is here because of compability. It returns priority
146 * of the isr vector last set by tms570_irq_set_priority function.
147 *
148 * @warning It does not return any real priority of the HW layer.
149 * @param[in] vector vector of isr
150 * @retval 0 vector is invalid.
151 * @retval priority priority of the interrupt
152 */
153unsigned tms570_irq_get_priority( rtems_vector_number vector );
154
155#endif /* ASM */
156
157/** @} */
158
159#endif /* LIBBSP_ARM_TMS570_IRQ_H */
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