source: rtems/bsps/arm/stm32h7/include/bsp/irq.h @ 94cf67c

Last change on this file since 94cf67c was 94cf67c, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/21 at 10:48:27

bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAX

This define is no longer used.

Update #3269.
  • Property mode set to 100644
File size: 1.6 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28#ifndef LIBBSP_ARM_STM32H7_IRQ_H
29#define LIBBSP_ARM_STM32H7_IRQ_H
30
31#ifndef ASM
32
33#include <rtems.h>
34#include <rtems/irq.h>
35#include <rtems/irq-extension.h>
36
37#endif /* ASM */
38
39#define BSP_INTERRUPT_VECTOR_COUNT 240
40
41#endif /* LIBBSP_ARM_STM32H7_IRQ_H */
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