1 | /** |
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2 | * @file |
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3 | * @ingroup stm32_i2c |
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4 | * @brief STM32 I2C support. |
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5 | */ |
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6 | |
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7 | /* |
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8 | * Copyright (c) 2013 Christian Mauderer. All rights reserved. |
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9 | * |
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10 | * embedded brains GmbH |
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11 | * Obere Lagerstr. 30 |
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12 | * 82178 Puchheim |
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13 | * Germany |
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14 | * <rtems@embedded-brains.de> |
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15 | * |
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16 | * The license and distribution terms for this file may be |
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17 | * found in the file LICENSE in this distribution or at |
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18 | * http://www.rtems.org/license/LICENSE. |
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19 | */ |
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20 | |
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21 | #ifndef LIBBSP_ARM_STM32F4_STM32_I2C_H |
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22 | #define LIBBSP_ARM_STM32F4_STM32_I2C_H |
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23 | |
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24 | #include <bsp/utility.h> |
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25 | |
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26 | /** |
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27 | * @defgroup stm32_i2c STM32 I2C Support |
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28 | * @ingroup stm32f4_i2c |
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29 | * @brief STM32 I2C Support |
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30 | * @{ |
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31 | */ |
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32 | |
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33 | typedef struct { |
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34 | uint32_t cr1; |
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35 | #define STM32F4_I2C_CR1_SWRST BSP_BIT32(15) |
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36 | #define STM32F4_I2C_CR1_ALERT BSP_BIT32(13) |
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37 | #define STM32F4_I2C_CR1_PEC BSP_BIT32(12) |
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38 | #define STM32F4_I2C_CR1_POS BSP_BIT32(11) |
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39 | #define STM32F4_I2C_CR1_ACK BSP_BIT32(10) |
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40 | #define STM32F4_I2C_CR1_STOP BSP_BIT32(9) |
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41 | #define STM32F4_I2C_CR1_START BSP_BIT32(8) |
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42 | #define STM32F4_I2C_CR1_NOSTRETCH BSP_BIT32(7) |
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43 | #define STM32F4_I2C_CR1_ENGC BSP_BIT32(6) |
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44 | #define STM32F4_I2C_CR1_ENPEC BSP_BIT32(5) |
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45 | #define STM32F4_I2C_CR1_ENARP BSP_BIT32(4) |
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46 | #define STM32F4_I2C_CR1_SMBTYPE BSP_BIT32(3) |
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47 | #define STM32F4_I2C_CR1_SMBUS BSP_BIT32(1) |
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48 | #define STM32F4_I2C_CR1_PE BSP_BIT32(0) |
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49 | uint32_t cr2; |
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50 | #define STM32F4_I2C_CR2_LAST BSP_BIT32(12) |
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51 | #define STM32F4_I2C_CR2_DMAEN BSP_BIT32(11) |
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52 | #define STM32F4_I2C_CR2_ITBUFEN BSP_BIT32(10) |
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53 | #define STM32F4_I2C_CR2_ITEVTEN BSP_BIT32(9) |
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54 | #define STM32F4_I2C_CR2_ITERREN BSP_BIT32(8) |
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55 | #define STM32F4_I2C_CR2_FREQ(val) BSP_FLD32(val, 0, 5) |
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56 | #define STM32F4_I2C_CR2_FREQ_GET(reg) BSP_FLD32GET(reg, 0, 5) |
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57 | #define STM32F4_I2C_CR2_FREQ_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5) |
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58 | uint32_t oar1; |
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59 | #define STM32F4_I2C_OAR1_ADDMODE BSP_BIT32(15) |
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60 | #define STM32F4_I2C_OAR1_ADD(val) BSP_FLD32(val, 0, 9) |
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61 | #define STM32F4_I2C_OAR1_ADD_GET(reg) BSP_FLD32GET(reg, 0, 9) |
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62 | #define STM32F4_I2C_OAR1_ADD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 9) |
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63 | uint32_t oar2; |
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64 | #define STM32F4_I2C_OAR2_ADD2(val) BSP_FLD32(val, 1, 7) |
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65 | #define STM32F4_I2C_OAR2_ADD2_GET(reg) BSP_FLD32GET(reg, 1, 7) |
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66 | #define STM32F4_I2C_OAR2_ADD2_SET(reg, val) BSP_FLD32SET(reg, val, 1, 7) |
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67 | #define STM32F4_I2C_OAR2_ENDUAL BSP_BIT32(0) |
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68 | uint32_t dr; |
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69 | #define STM32F4_I2C_DR(val) BSP_FLD32(val, 0, 7) |
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70 | #define STM32F4_I2C_DR_GET(reg) BSP_FLD32GET(reg, 0, 7) |
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71 | #define STM32F4_I2C_DR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7) |
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72 | uint32_t sr1; |
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73 | #define STM32F4_I2C_SR1_SMBALERT BSP_BIT32(15) |
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74 | #define STM32F4_I2C_SR1_TIMEOUT BSP_BIT32(14) |
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75 | #define STM32F4_I2C_SR1_PECERR BSP_BIT32(12) |
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76 | #define STM32F4_I2C_SR1_OVR BSP_BIT32(11) |
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77 | #define STM32F4_I2C_SR1_AF BSP_BIT32(10) |
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78 | #define STM32F4_I2C_SR1_ARLO BSP_BIT32(9) |
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79 | #define STM32F4_I2C_SR1_BERR BSP_BIT32(8) |
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80 | #define STM32F4_I2C_SR1_TxE BSP_BIT32(7) |
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81 | #define STM32F4_I2C_SR1_RxNE BSP_BIT32(6) |
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82 | #define STM32F4_I2C_SR1_STOPF BSP_BIT32(4) |
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83 | #define STM32F4_I2C_SR1_ADD10 BSP_BIT32(3) |
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84 | #define STM32F4_I2C_SR1_BTF BSP_BIT32(2) |
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85 | #define STM32F4_I2C_SR1_ADDR BSP_BIT32(1) |
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86 | #define STM32F4_I2C_SR1_SB BSP_BIT32(0) |
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87 | uint32_t sr2; |
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88 | #define STM32F4_I2C_SR2_PEC(val) BSP_FLD32(val, 8, 15) |
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89 | #define STM32F4_I2C_SR2_PEC_GET(reg) BSP_FLD32GET(reg, 8, 15) |
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90 | #define STM32F4_I2C_SR2_PEC_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15) |
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91 | #define STM32F4_I2C_SR2_DUALF BSP_BIT32(7) |
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92 | #define STM32F4_I2C_SR2_SMBHOST BSP_BIT32(6) |
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93 | #define STM32F4_I2C_SR2_SMBDEFAULT BSP_BIT32(5) |
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94 | #define STM32F4_I2C_SR2_GENCALL BSP_BIT32(4) |
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95 | #define STM32F4_I2C_SR2_TRA BSP_BIT32(2) |
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96 | #define STM32F4_I2C_SR2_BUSY BSP_BIT32(1) |
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97 | #define STM32F4_I2C_SR2_MSL BSP_BIT32(0) |
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98 | uint32_t ccr; |
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99 | #define STM32F4_I2C_CCR_FS BSP_BIT32(15) |
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100 | #define STM32F4_I2C_CCR_DUTY BSP_BIT32(14) |
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101 | #define STM32F4_I2C_CCR_CCR(val) BSP_FLD32(val, 0, 11) |
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102 | #define STM32F4_I2C_CCR_CCR_GET(reg) BSP_FLD32GET(reg, 0, 11) |
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103 | #define STM32F4_I2C_CCR_CCR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 11) |
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104 | #define STM32F4_I2C_CCR_CCR_MAX STM32F4_I2C_CCR_CCR_GET(BSP_MSK32(0, 11)) |
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105 | uint32_t trise; |
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106 | #define STM32F4_I2C_TRISE(val) BSP_FLD32(val, 0, 5) |
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107 | #define STM32F4_I2C_TRISE_GET(reg) BSP_FLD32GET(reg, 0, 5) |
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108 | #define STM32F4_I2C_TRISE_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5) |
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109 | } stm32f4_i2c; |
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110 | |
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111 | /** @} */ |
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112 | |
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113 | #endif /* LIBBSP_ARM_STM32F4_STM32_I2C_H */ |
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