source: rtems/bsps/arm/stm32f4/include/bsp/irq.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on 12/23/17 at 07:18:56

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 3.8 KB
Line 
1/**
2 * @file
3 * @ingroup stm32f4_interrupt
4 * @brief Interrupt definitions.
5 */
6
7/*
8 * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
9 *
10 *  embedded brains GmbH
11 *  Obere Lagerstr. 30
12 *  82178 Puchheim
13 *  Germany
14 *  <rtems@embedded-brains.de>
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.org/license/LICENSE.
19 */
20
21#ifndef LIBBSP_ARM_STM32F4_IRQ_H
22#define LIBBSP_ARM_STM32F4_IRQ_H
23
24#ifndef ASM
25
26#include <rtems.h>
27#include <rtems/irq.h>
28#include <rtems/irq-extension.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif /* __cplusplus */
33
34#ifdef __cplusplus
35}
36#endif /* __cplusplus */
37
38#endif /* ASM */
39
40/**
41 * @defgroup stm32f4_interrupt Interrupt Support
42 * @ingroup arm_stm32f4
43 * @brief Interrupt Support
44 * @{
45 */
46
47#define STM32F4_IRQ_WWDG 0
48#define STM32F4_IRQ_PVD 1
49#define STM32F4_IRQ_TAMP_STAMP 2
50#define STM32F4_IRQ_RTC_WKUP 3
51#define STM32F4_IRQ_FLASH 4
52#define STM32F4_IRQ_RCC 5
53#define STM32F4_IRQ_EXTI0 6
54#define STM32F4_IRQ_EXTI1 7
55#define STM32F4_IRQ_EXTI2 8
56#define STM32F4_IRQ_EXTI3 9
57#define STM32F4_IRQ_EXTI4 10
58#define STM32F4_IRQ_DMA1_STREAM0 11
59#define STM32F4_IRQ_DMA1_STREAM1 12
60#define STM32F4_IRQ_DMA1_STREAM2 13
61#define STM32F4_IRQ_DMA1_STREAM3 14
62#define STM32F4_IRQ_DMA1_STREAM4 15
63#define STM32F4_IRQ_DMA1_STREAM5 16
64#define STM32F4_IRQ_DMA1_STREAM6 17
65#define STM32F4_IRQ_ADC 18
66#define STM32F4_IRQ_CAN1_TX 19
67#define STM32F4_IRQ_CAN1_RX0 20
68#define STM32F4_IRQ_CAN1_RX1 21
69#define STM32F4_IRQ_CAN1_SCE 22
70#define STM32F4_IRQ_EXTI9_5 23
71#define STM32F4_IRQ_TIM1_BRK_TIM9 24
72#define STM32F4_IRQ_TIM1_UP_TIM10 25
73#define STM32F4_IRQ_TIM1_TRG_COM_TIM11 26
74#define STM32F4_IRQ_TIM1_CC 27
75#define STM32F4_IRQ_TIM2 28
76#define STM32F4_IRQ_TIM3 29
77#define STM32F4_IRQ_TIM4 30
78#define STM32F4_IRQ_I2C1_EV 31
79#define STM32F4_IRQ_I2C1_ER 32
80#define STM32F4_IRQ_I2C2_EV 33
81#define STM32F4_IRQ_I2C2_ER 34
82#define STM32F4_IRQ_SPI1 35
83#define STM32F4_IRQ_SPI2 36
84#define STM32F4_IRQ_USART1 37
85#define STM32F4_IRQ_USART2 38
86#define STM32F4_IRQ_USART3 39
87#define STM32F4_IRQ_EXTI15_10 40
88#define STM32F4_IRQ_RTC_ALARM 41
89#define STM32F4_IRQ_OTG_FS_WKUP 42
90#define STM32F4_IRQ_TIM8_BRK_TIM12 43
91#define STM32F4_IRQ_TIM8_UP_TIM13 44
92#define STM32F4_IRQ_TIM8_TRG_COM_TIM14 45
93#define STM32F4_IRQ_TIM8_CC 46
94#define STM32F4_IRQ_DMA1_STREAM7 47
95#define STM32F4_IRQ_FSMC 48
96#define STM32F4_IRQ_SDIO 49
97#define STM32F4_IRQ_TIM5 50
98#define STM32F4_IRQ_SPI3 51
99#define STM32F4_IRQ_UART4 52
100#define STM32F4_IRQ_UART5 53
101#define STM32F4_IRQ_TIM6_DAC 54
102#define STM32F4_IRQ_TIM7 55
103#define STM32F4_IRQ_DMA2_STREAM0 56
104#define STM32F4_IRQ_DMA2_STREAM1 57
105#define STM32F4_IRQ_DMA2_STREAM2 58
106#define STM32F4_IRQ_DMA2_STREAM3 59
107#define STM32F4_IRQ_DMA2_STREAM4 60
108#define STM32F4_IRQ_ETH 61
109#define STM32F4_IRQ_ETH_WKUP 62
110#define STM32F4_IRQ_CAN2_TX 63
111#define STM32F4_IRQ_CAN2_RX0 64
112#define STM32F4_IRQ_CAN2_RX1 65
113#define STM32F4_IRQ_CAN2_SCE 66
114#define STM32F4_IRQ_OTG_FS 67
115#define STM32F4_IRQ_DMA2_STREAM5 68
116#define STM32F4_IRQ_DMA2_STREAM6 69
117#define STM32F4_IRQ_DMA2_STREAM7 70
118#define STM32F4_IRQ_USART6 71
119#define STM32F4_IRQ_I2C3_EV 72
120#define STM32F4_IRQ_I2C3_ER 73
121#define STM32F4_IRQ_OTG_HS_EP1_OUT 74
122#define STM32F4_IRQ_OTG_HS_EP1_IN 75
123#define STM32F4_IRQ_OTG_HS_WKUP 76
124#define STM32F4_IRQ_OTG_HS 77
125#define STM32F4_IRQ_DCMI 78
126#define STM32F4_IRQ_CRYP 79
127#define STM32F4_IRQ_HASH_RNG 80
128#define STM32F4_IRQ_FPU 81
129
130#define STM32F4_IRQ_PRIORITY_VALUE_MIN 0
131#define STM32F4_IRQ_PRIORITY_VALUE_MAX 15
132#define STM32F4_IRQ_PRIORITY_COUNT (STM32F4_IRQ_PRIORITY_VALUE_MAX + 1)
133#define STM32F4_IRQ_PRIORITY_HIGHEST STM32F4_IRQ_PRIORITY_VALUE_MIN
134#define STM32F4_IRQ_PRIORITY_LOWEST STM32F4_IRQ_PRIORITY_VALUE_MAX
135
136#define BSP_INTERRUPT_VECTOR_MIN 0
137#define BSP_INTERRUPT_VECTOR_MAX 81
138
139/** @} */
140
141#endif /* LIBBSP_ARM_STM32F4_IRQ_H */
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