[8224d2af] | 1 | /** |
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| 2 | * @file |
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| 3 | * @ingroup stm32f4_interrupt |
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| 4 | * @brief Interrupt definitions. |
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| 5 | */ |
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| 6 | |
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[e230fb4] | 7 | /* |
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| 8 | * Copyright (c) 2012 Sebastian Huber. All rights reserved. |
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| 9 | * |
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| 10 | * embedded brains GmbH |
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| 11 | * Obere Lagerstr. 30 |
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| 12 | * 82178 Puchheim |
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| 13 | * Germany |
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| 14 | * <rtems@embedded-brains.de> |
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| 15 | * |
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| 16 | * The license and distribution terms for this file may be |
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| 17 | * found in the file LICENSE in this distribution or at |
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[c499856] | 18 | * http://www.rtems.org/license/LICENSE. |
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[e230fb4] | 19 | */ |
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| 20 | |
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| 21 | #ifndef LIBBSP_ARM_STM32F4_IRQ_H |
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| 22 | #define LIBBSP_ARM_STM32F4_IRQ_H |
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| 23 | |
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| 24 | #ifndef ASM |
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| 25 | |
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| 26 | #include <rtems.h> |
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| 27 | #include <rtems/irq.h> |
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| 28 | #include <rtems/irq-extension.h> |
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| 29 | |
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| 30 | #ifdef __cplusplus |
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| 31 | extern "C" { |
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| 32 | #endif /* __cplusplus */ |
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| 33 | |
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| 34 | #ifdef __cplusplus |
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| 35 | } |
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| 36 | #endif /* __cplusplus */ |
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| 37 | |
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| 38 | #endif /* ASM */ |
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| 39 | |
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[8224d2af] | 40 | /** |
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| 41 | * @defgroup stm32f4_interrupt Interrupt Support |
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| 42 | * @ingroup arm_stm32f4 |
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| 43 | * @brief Interrupt Support |
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| 44 | * @{ |
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| 45 | */ |
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| 46 | |
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[e230fb4] | 47 | #define STM32F4_IRQ_WWDG 0 |
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| 48 | #define STM32F4_IRQ_PVD 1 |
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| 49 | #define STM32F4_IRQ_TAMP_STAMP 2 |
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| 50 | #define STM32F4_IRQ_RTC_WKUP 3 |
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| 51 | #define STM32F4_IRQ_FLASH 4 |
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| 52 | #define STM32F4_IRQ_RCC 5 |
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| 53 | #define STM32F4_IRQ_EXTI0 6 |
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| 54 | #define STM32F4_IRQ_EXTI1 7 |
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| 55 | #define STM32F4_IRQ_EXTI2 8 |
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| 56 | #define STM32F4_IRQ_EXTI3 9 |
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| 57 | #define STM32F4_IRQ_EXTI4 10 |
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| 58 | #define STM32F4_IRQ_DMA1_STREAM0 11 |
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| 59 | #define STM32F4_IRQ_DMA1_STREAM1 12 |
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| 60 | #define STM32F4_IRQ_DMA1_STREAM2 13 |
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| 61 | #define STM32F4_IRQ_DMA1_STREAM3 14 |
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| 62 | #define STM32F4_IRQ_DMA1_STREAM4 15 |
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| 63 | #define STM32F4_IRQ_DMA1_STREAM5 16 |
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| 64 | #define STM32F4_IRQ_DMA1_STREAM6 17 |
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| 65 | #define STM32F4_IRQ_ADC 18 |
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| 66 | #define STM32F4_IRQ_CAN1_TX 19 |
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| 67 | #define STM32F4_IRQ_CAN1_RX0 20 |
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| 68 | #define STM32F4_IRQ_CAN1_RX1 21 |
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| 69 | #define STM32F4_IRQ_CAN1_SCE 22 |
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| 70 | #define STM32F4_IRQ_EXTI9_5 23 |
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| 71 | #define STM32F4_IRQ_TIM1_BRK_TIM9 24 |
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| 72 | #define STM32F4_IRQ_TIM1_UP_TIM10 25 |
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| 73 | #define STM32F4_IRQ_TIM1_TRG_COM_TIM11 26 |
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| 74 | #define STM32F4_IRQ_TIM1_CC 27 |
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| 75 | #define STM32F4_IRQ_TIM2 28 |
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| 76 | #define STM32F4_IRQ_TIM3 29 |
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| 77 | #define STM32F4_IRQ_TIM4 30 |
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| 78 | #define STM32F4_IRQ_I2C1_EV 31 |
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| 79 | #define STM32F4_IRQ_I2C1_ER 32 |
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| 80 | #define STM32F4_IRQ_I2C2_EV 33 |
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| 81 | #define STM32F4_IRQ_I2C2_ER 34 |
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| 82 | #define STM32F4_IRQ_SPI1 35 |
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| 83 | #define STM32F4_IRQ_SPI2 36 |
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| 84 | #define STM32F4_IRQ_USART1 37 |
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| 85 | #define STM32F4_IRQ_USART2 38 |
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| 86 | #define STM32F4_IRQ_USART3 39 |
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| 87 | #define STM32F4_IRQ_EXTI15_10 40 |
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| 88 | #define STM32F4_IRQ_RTC_ALARM 41 |
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| 89 | #define STM32F4_IRQ_OTG_FS_WKUP 42 |
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| 90 | #define STM32F4_IRQ_TIM8_BRK_TIM12 43 |
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| 91 | #define STM32F4_IRQ_TIM8_UP_TIM13 44 |
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| 92 | #define STM32F4_IRQ_TIM8_TRG_COM_TIM14 45 |
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| 93 | #define STM32F4_IRQ_TIM8_CC 46 |
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| 94 | #define STM32F4_IRQ_DMA1_STREAM7 47 |
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| 95 | #define STM32F4_IRQ_FSMC 48 |
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| 96 | #define STM32F4_IRQ_SDIO 49 |
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| 97 | #define STM32F4_IRQ_TIM5 50 |
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| 98 | #define STM32F4_IRQ_SPI3 51 |
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| 99 | #define STM32F4_IRQ_UART4 52 |
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| 100 | #define STM32F4_IRQ_UART5 53 |
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| 101 | #define STM32F4_IRQ_TIM6_DAC 54 |
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| 102 | #define STM32F4_IRQ_TIM7 55 |
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| 103 | #define STM32F4_IRQ_DMA2_STREAM0 56 |
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| 104 | #define STM32F4_IRQ_DMA2_STREAM1 57 |
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| 105 | #define STM32F4_IRQ_DMA2_STREAM2 58 |
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| 106 | #define STM32F4_IRQ_DMA2_STREAM3 59 |
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| 107 | #define STM32F4_IRQ_DMA2_STREAM4 60 |
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| 108 | #define STM32F4_IRQ_ETH 61 |
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| 109 | #define STM32F4_IRQ_ETH_WKUP 62 |
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| 110 | #define STM32F4_IRQ_CAN2_TX 63 |
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| 111 | #define STM32F4_IRQ_CAN2_RX0 64 |
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| 112 | #define STM32F4_IRQ_CAN2_RX1 65 |
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| 113 | #define STM32F4_IRQ_CAN2_SCE 66 |
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| 114 | #define STM32F4_IRQ_OTG_FS 67 |
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| 115 | #define STM32F4_IRQ_DMA2_STREAM5 68 |
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| 116 | #define STM32F4_IRQ_DMA2_STREAM6 69 |
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| 117 | #define STM32F4_IRQ_DMA2_STREAM7 70 |
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| 118 | #define STM32F4_IRQ_USART6 71 |
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| 119 | #define STM32F4_IRQ_I2C3_EV 72 |
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| 120 | #define STM32F4_IRQ_I2C3_ER 73 |
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| 121 | #define STM32F4_IRQ_OTG_HS_EP1_OUT 74 |
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| 122 | #define STM32F4_IRQ_OTG_HS_EP1_IN 75 |
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| 123 | #define STM32F4_IRQ_OTG_HS_WKUP 76 |
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| 124 | #define STM32F4_IRQ_OTG_HS 77 |
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| 125 | #define STM32F4_IRQ_DCMI 78 |
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| 126 | #define STM32F4_IRQ_CRYP 79 |
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| 127 | #define STM32F4_IRQ_HASH_RNG 80 |
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| 128 | #define STM32F4_IRQ_FPU 81 |
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| 129 | |
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| 130 | #define STM32F4_IRQ_PRIORITY_VALUE_MIN 0 |
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| 131 | #define STM32F4_IRQ_PRIORITY_VALUE_MAX 15 |
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| 132 | #define STM32F4_IRQ_PRIORITY_COUNT (STM32F4_IRQ_PRIORITY_VALUE_MAX + 1) |
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| 133 | #define STM32F4_IRQ_PRIORITY_HIGHEST STM32F4_IRQ_PRIORITY_VALUE_MIN |
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| 134 | #define STM32F4_IRQ_PRIORITY_LOWEST STM32F4_IRQ_PRIORITY_VALUE_MAX |
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| 135 | |
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| 136 | #define BSP_INTERRUPT_VECTOR_MIN 0 |
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| 137 | #define BSP_INTERRUPT_VECTOR_MAX 81 |
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| 138 | |
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[8224d2af] | 139 | /** @} */ |
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| 140 | |
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[e230fb4] | 141 | #endif /* LIBBSP_ARM_STM32F4_IRQ_H */ |
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