source: rtems/bsps/arm/smdk2410/start/start.S @ 511dc4b

5
Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.
  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 * SMDK2410 startup code
3 */
4
5/*
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.rtems.org/license/LICENSE.
9 */
10
11#include <rtems/asm.h>
12#include <rtems/score/cpu.h>
13
14.text
15.globl  _start
16_start:
17        b               _start2
18
19@---------------------------------------------------------------------------------
20@ AXF addresses
21@---------------------------------------------------------------------------------
22        .word   bsp_section_text_begin
23        .word   bsp_section_rodata_end
24        .word   bsp_section_data_begin
25        .word   bsp_section_bss_end
26        .word   bsp_section_bss_begin
27        .word   bsp_section_bss_end
28
29@---------------------------------------------------------------------------------
30@ GamePark magic sequence
31@---------------------------------------------------------------------------------
32        .word   0x44450011
33        .word   0x44450011
34        .word   0x01234567
35        .word   0x12345678
36        .word   0x23456789
37        .word   0x34567890
38        .word   0x45678901
39        .word   0x56789012
40        .word   0x23456789
41        .word   0x34567890
42        .word   0x45678901
43        .word   0x56789012
44        .word   0x23456789
45        .word   0x34567890
46        .word   0x45678901
47        .word   0x56789012
48
49@---------------------------------------------------------------------------------
50_start2:
51@---------------------------------------------------------------------------------
52
53        /*
54         * Since I don't plan to return to the bootloader,
55         * I don't have to save the registers.
56         */
57
58        /* Set end of interrupt stack area */
59        ldr     r7, =_Configuration_Interrupt_stack_area_end
60
61        /* Enter FIQ mode and set up the FIQ stack pointer */
62        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
63        msr     cpsr, r0
64        ldr     r1, =bsp_stack_fiq_size
65        mov     sp, r7
66        sub     r7, r7, r1
67
68        /* Enter ABT mode and set up the ABT stack pointer */
69        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
70        msr     cpsr, r0
71        ldr     r1, =bsp_stack_abt_size
72        mov     sp, r7
73        sub     r7, r7, r1
74
75        /* Enter UND mode and set up the UND stack pointer */
76        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
77        msr     cpsr, r0
78        ldr     r1, =bsp_stack_und_size
79        mov     sp, r7
80        sub     r7, r7, r1
81
82        /* Enter IRQ mode and set up the IRQ stack pointer */
83        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
84        msr     cpsr, r0
85        mov     sp, r7
86
87        /*
88         * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack
89         * (interrupts are disabled).
90         */
91        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
92        msr     cpsr, r0
93        mov     sp, r7
94
95        /* Stay in SVC mode */
96
97        /* disable mmu, I and D caches*/
98        nop
99        nop
100        mrc p15, 0, r0, c1, c0, 0
101        bic r0, r0, #0x01
102        bic r0, r0, #0x04
103        bic r0, r0, #0x01000
104        mcr p15, 0, r0, c1, c0, 0
105        nop
106        nop
107
108        /* clean data cache */
109        mov   r1,#0x00
110Loop1:
111        mov   r2,#0x00
112Loop2:
113        mov r3, r2, lsl#26
114        orr r3, r3, r1, lsl#5
115        mcr p15, 0, r3, c7, c14, 2
116        add r2, r2, #0x01
117        cmp r2, #64
118        bne Loop2
119        add r1, r1, #0x01
120        cmp r1, #8
121        bne Loop1
122
123
124        /*
125         * Initialize the MMU. After we return, the MMU is enabled,
126         * and memory may be remapped. I hope we don't remap this
127         * memory away.
128         */
129        ldr     r0, =mem_map
130        bl      mmu_init
131
132        /*
133         * Initialize the exception vectors. This includes the
134         * exceptions vectors (0x00000000-0x0000001c), and the
135         * pointers to the exception handlers (0x00000020-0x0000003c).
136         */
137        mov     r0, #0
138        adr     r1, vector_block
139        ldmia   r1!, {r2-r9}
140        stmia   r0!, {r2-r9}
141        ldmia   r1!, {r2-r9}
142        stmia   r0!, {r2-r9}
143
144        /* Now we are prepared to start the BSP's C code */
145        mov     r0, #0
146        bl      boot_card
147
148        /*
149         * Theoretically, we could return to what started us up,
150         * but we'd have to have saved the registers and stacks.
151         * Instead, we'll just reset.
152         */
153        bl      bsp_reset
154
155        /* We shouldn't get here. If we do, hang */
156_hang:  b       _hang
157
158
159/*
160 * This is the exception vector table and the pointers to
161 * the functions that handle the exceptions. It's a total
162 * of 16 words (64 bytes)
163 */
164vector_block:
165        ldr    pc, handler_addr_reset
166        ldr    pc, handler_addr_undef
167        ldr    pc, handler_addr_swi
168        ldr    pc, handler_addr_prefetch
169        ldr    pc, handler_addr_abort
170        nop
171        ldr    pc, handler_addr_irq
172        ldr    pc, handler_addr_fiq
173
174handler_addr_reset:
175        .word  bsp_reset
176
177handler_addr_undef:
178        .word  _ARMV4_Exception_undef_default
179
180handler_addr_swi:
181        .word  _ARMV4_Exception_swi_default
182
183handler_addr_prefetch:
184        .word  _ARMV4_Exception_pref_abort_default
185
186handler_addr_abort:
187        .word  _ARMV4_Exception_data_abort_default
188
189handler_addr_reserved:
190        .word  _ARMV4_Exception_reserved_default
191
192handler_addr_irq:
193        .word  _ARMV4_Exception_interrupt
194
195handler_addr_fiq:
196        .word  _ARMV4_Exception_fiq_default
Note: See TracBrowser for help on using the repository browser.