source: rtems/bsps/arm/smdk2410/include/bsp/irq.h @ 2afb22b

Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 2.6 KB
Line 
1/* irq.h
2 *
3 *  Copyright (c) 2010 embedded brains GmbH.
4 *
5 *  CopyRight (C) 2000 Canon Research France SA.
6 *  Emmanuel Raguet,  mailto:raguet@crf.canon.fr
7 *
8 *  Common file, merged from s3c2400/irq/irq.h and s3c2410/irq/irq.h
9 */
10
11#ifndef _IRQ_H_
12#define _IRQ_H_
13
14#include <rtems.h>
15#include <rtems/irq.h>
16#include <rtems/irq-extension.h>
17
18#include <s3c24xx.h>
19
20#ifdef CPU_S3C2400
21  /* possible interrupt sources */
22#define BSP_EINT0             0
23#define BSP_EINT1             1
24#define BSP_EINT2             2
25#define BSP_EINT3             3
26#define BSP_EINT4             4
27#define BSP_EINT5             5
28#define BSP_EINT6             6
29#define BSP_EINT7             7
30#define BSP_INT_TICK          8
31#define BSP_INT_WDT           9
32#define BSP_INT_TIMER0       10
33#define BSP_INT_TIMER1       11
34#define BSP_INT_TIMER2       12
35#define BSP_INT_TIMER3       13
36#define BSP_INT_TIMER4       14
37#define BSP_INT_UERR01       15
38#define _res0                16
39#define BSP_INT_DMA0         17
40#define BSP_INT_DMA1         18
41#define BSP_INT_DMA2         19
42#define BSP_INT_DMA3         20
43#define BSP_INT_MMC          21
44#define BSP_INT_SPI          22
45#define BSP_INT_URXD0        23
46#define BSP_INT_URXD1        24
47#define BSP_INT_USBD         25
48#define BSP_INT_USBH         26
49#define BSP_INT_IIC          27
50#define BSP_INT_UTXD0        28
51#define BSP_INT_UTXD1        29
52#define BSP_INT_RTC          30
53#define BSP_INT_ADC          31
54#define BSP_MAX_INT          32
55
56#elif defined CPU_S3C2410
57  /* possible interrupt sources */
58#define BSP_EINT0             0
59#define BSP_EINT1             1
60#define BSP_EINT2             2
61#define BSP_EINT3             3
62#define BSP_EINT4_7           4
63#define BSP_EINT8_23          5
64#define BSP_nBATT_FLT         7
65#define BSP_INT_TICK          8
66#define BSP_INT_WDT           9
67#define BSP_INT_TIMER0       10
68#define BSP_INT_TIMER1       11
69#define BSP_INT_TIMER2       12
70#define BSP_INT_TIMER3       13
71#define BSP_INT_TIMER4       14
72#define BSP_INT_UART2        15
73#define BSP_INT_LCD          16
74#define BSP_INT_DMA0         17
75#define BSP_INT_DMA1         18
76#define BSP_INT_DMA2         19
77#define BSP_INT_DMA3         20
78#define BSP_INT_SDI          21
79#define BSP_INT_SPI0         22
80#define BSP_INT_UART1        23
81#define BSP_INT_USBD         25
82#define BSP_INT_USBH         26
83#define BSP_INT_IIC          27
84#define BSP_INT_UART0        28
85#define BSP_INT_SPI1         29
86#define BSP_INT_RTC          30
87#define BSP_INT_ADC          31
88#define BSP_MAX_INT          32
89#endif
90
91#define BSP_INTERRUPT_VECTOR_MIN 0
92
93#define BSP_INTERRUPT_VECTOR_MAX (BSP_MAX_INT - 1)
94
95#endif /* _IRQ_H_ */
96/* end of include file */
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