source: rtems/bsps/arm/shared/irq/irq-gic.c @ ff081aee

5
Last change on this file since ff081aee was 8f8ccee, checked in by Sebastian Huber <sebastian.huber@…>, on 04/23/18 at 07:50:39

bsps: Move interrupt controller support to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 4.0 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <bsp/arm-gic.h>
16
17#include <rtems/score/armv4.h>
18
19#include <libcpu/arm-cp15.h>
20
21#include <bsp/irq.h>
22#include <bsp/irq-generic.h>
23#include <bsp/start.h>
24
25#define GIC_CPUIF ((volatile gic_cpuif *) BSP_ARM_GIC_CPUIF_BASE)
26
27#define PRIORITY_DEFAULT 127
28
29void bsp_interrupt_dispatch(void)
30{
31  volatile gic_cpuif *cpuif = GIC_CPUIF;
32  uint32_t icciar = cpuif->icciar;
33  rtems_vector_number vector = GIC_CPUIF_ICCIAR_ACKINTID_GET(icciar);
34  rtems_vector_number spurious = 1023;
35
36  if (vector != spurious) {
37    uint32_t psr = _ARMV4_Status_irq_enable();
38
39    bsp_interrupt_handler_dispatch(vector);
40
41    _ARMV4_Status_restore(psr);
42
43    cpuif->icceoir = icciar;
44  }
45}
46
47void bsp_interrupt_vector_enable(rtems_vector_number vector)
48{
49  volatile gic_dist *dist = ARM_GIC_DIST;
50
51  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
52
53  gic_id_enable(dist, vector);
54}
55
56void bsp_interrupt_vector_disable(rtems_vector_number vector)
57{
58  volatile gic_dist *dist = ARM_GIC_DIST;
59
60  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
61
62  gic_id_disable(dist, vector);
63}
64
65static inline uint32_t get_id_count(volatile gic_dist *dist)
66{
67  uint32_t id_count = GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(dist->icdictr);
68
69  id_count = 32 * (id_count + 1);
70  id_count = id_count <= 1020 ? id_count : 1020;
71
72  return id_count;
73}
74
75rtems_status_code bsp_interrupt_facility_initialize(void)
76{
77  volatile gic_cpuif *cpuif = GIC_CPUIF;
78  volatile gic_dist *dist = ARM_GIC_DIST;
79  uint32_t id_count = get_id_count(dist);
80  uint32_t id;
81
82  arm_cp15_set_exception_handler(
83    ARM_EXCEPTION_IRQ,
84    _ARMV4_Exception_interrupt
85  );
86
87  for (id = 0; id < id_count; id += 32) {
88    dist->icdicer[id / 32] = 0xffffffff;
89  }
90
91  for (id = 0; id < id_count; ++id) {
92    gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
93  }
94
95  for (id = 32; id < id_count; ++id) {
96    gic_id_set_targets(dist, id, 0x01);
97  }
98
99  cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
100  cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);
101  cpuif->iccicr = GIC_CPUIF_ICCICR_ENABLE;
102
103  dist->icddcr = GIC_DIST_ICDDCR_ENABLE;
104
105  return RTEMS_SUCCESSFUL;
106}
107
108#ifdef RTEMS_SMP
109BSP_START_TEXT_SECTION void arm_gic_irq_initialize_secondary_cpu(void)
110{
111  volatile gic_cpuif *cpuif = GIC_CPUIF;
112  volatile gic_dist *dist = ARM_GIC_DIST;
113
114  while ((dist->icddcr & GIC_DIST_ICDDCR_ENABLE) == 0) {
115    /* Wait */
116  }
117
118  cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
119  cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);
120  cpuif->iccicr = GIC_CPUIF_ICCICR_ENABLE;
121}
122#endif
123
124rtems_status_code arm_gic_irq_set_priority(
125  rtems_vector_number vector,
126  uint8_t priority
127)
128{
129  rtems_status_code sc = RTEMS_SUCCESSFUL;
130
131  if (bsp_interrupt_is_valid_vector(vector)) {
132    volatile gic_dist *dist = ARM_GIC_DIST;
133
134    gic_id_set_priority(dist, vector, priority);
135  } else {
136    sc = RTEMS_INVALID_ID;
137  }
138
139  return sc;
140}
141
142rtems_status_code arm_gic_irq_get_priority(
143  rtems_vector_number vector,
144  uint8_t *priority
145)
146{
147  rtems_status_code sc = RTEMS_SUCCESSFUL;
148
149  if (bsp_interrupt_is_valid_vector(vector)) {
150    volatile gic_dist *dist = ARM_GIC_DIST;
151
152    *priority = gic_id_get_priority(dist, vector);
153  } else {
154    sc = RTEMS_INVALID_ID;
155  }
156
157  return sc;
158}
159
160void bsp_interrupt_set_affinity(
161  rtems_vector_number vector,
162  const Processor_mask *affinity
163)
164{
165  volatile gic_dist *dist = ARM_GIC_DIST;
166  uint8_t targets = (uint8_t) _Processor_mask_To_uint32_t(affinity, 0);
167
168  gic_id_set_targets(dist, vector, targets);
169}
170
171void bsp_interrupt_get_affinity(
172  rtems_vector_number vector,
173  Processor_mask *affinity
174)
175{
176  volatile gic_dist *dist = ARM_GIC_DIST;
177  uint8_t targets = gic_id_get_targets(dist, vector);
178
179  _Processor_mask_From_uint32_t(affinity, targets, 0);
180}
Note: See TracBrowser for help on using the repository browser.