source: rtems/bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c @ ba619b7f

Last change on this file since ba619b7f was ba619b7f, checked in by Joel Sherrill <joel@…>, on 03/01/22 at 21:38:20

bsps/arm/: Scripted embedded brains header file clean up

Updates #4625.

  • Property mode set to 100644
File size: 1.5 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 * The license and distribution terms for this file may be
5 * found in the file LICENSE in this distribution or at
6 * http://www.rtems.org/license/LICENSE.
7 */
8
9#include <libcpu/arm-cp15.h>
10
11#include <bsp/linker-symbols.h>
12
13void* arm_cp15_set_exception_handler(
14  Arm_symbolic_exception_name exception,
15  void (*handler)(void)
16)
17{
18  uint32_t current_handler = 0;
19
20  if ((unsigned) exception < MAX_EXCEPTIONS) {
21    uint32_t *cpu_table = (uint32_t *) 0 + MAX_EXCEPTIONS;
22    uint32_t *mirror_table = (uint32_t *) bsp_vector_table_begin + MAX_EXCEPTIONS;
23
24    current_handler = mirror_table[exception];
25
26    if (current_handler != (uint32_t) handler) {
27      size_t table_size = MAX_EXCEPTIONS * sizeof(uint32_t);
28      uint32_t cls = arm_cp15_get_min_cache_line_size();
29      uint32_t ctrl;
30      rtems_interrupt_level level;
31
32      rtems_interrupt_local_disable(level);
33
34      ctrl = arm_cp15_mmu_disable(cls);
35
36      mirror_table[exception] = (uint32_t) handler;
37
38      rtems_cache_flush_multiple_data_lines(mirror_table, table_size);
39
40      /*
41       * On ARMv7 processors with the Security Extension the mirror table might
42       * be the actual table used by the processor.
43       */
44      rtems_cache_invalidate_multiple_instruction_lines(mirror_table, table_size);
45
46      rtems_cache_invalidate_multiple_instruction_lines(cpu_table, table_size);
47
48      arm_cp15_set_control(ctrl);
49
50      rtems_interrupt_local_enable(level);
51    }
52  }
53
54  return (void*) current_handler;
55}
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