5
Last change
on this file since e0dd8a5a was
e0dd8a5a,
checked in by Sebastian Huber <sebastian.huber@…>, on 04/20/18 at 10:08:42
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bsps: Move benchmark timer to bsps
This patch is a part of the BSP source reorganization.
Update #3285.
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-
Property mode set to
100644
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File size:
1.2 KB
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Rev | Line | |
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[744d6174] | 1 | #ifndef __LPC_TIMER_H |
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| 2 | #define __LPC_TIMER_H |
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| 3 | |
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| 4 | /************************************************************************* |
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| 5 | * |
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| 6 | * File name : Timer.h |
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| 7 | * |
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| 8 | **************************************************************************/ |
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| 9 | |
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| 10 | /* Timer Control register bit descriptions */ |
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| 11 | #define TCR_ENABLE_BIT 0 |
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| 12 | #define TCR_RESET_BIT 1 |
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| 13 | |
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[359e537] | 14 | // The channel name which is used in matching, in fact they represent |
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| 15 | // corresponding Match Register |
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[744d6174] | 16 | #define CH_MAXNUM 4 |
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| 17 | #define CH0 0 |
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| 18 | #define CH1 1 |
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| 19 | #define CH2 2 |
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| 20 | #define CH3 3 |
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| 21 | |
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[359e537] | 22 | // The channel name which is used in capturing, in fact they represent |
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| 23 | // corresponding Capture Register |
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[744d6174] | 24 | #define CPCH_MAXNUM 4 |
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| 25 | #define CPCH0 0 |
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| 26 | #define CPCH1 1 |
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| 27 | #define CPCH2 2 |
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| 28 | #define CPCH3 3 |
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| 29 | |
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| 30 | //The actions when matching |
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| 31 | #define TimerAction_Interrupt 0x1 |
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| 32 | #define TimerAction_ResetTimer 0x2 |
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| 33 | #define TimerAction_StopTimer 0x4 |
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| 34 | |
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| 35 | //Interrupt source type |
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| 36 | #define TIMERMR0Int 0x01 |
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| 37 | #define TIMERMR1Int 0x02 |
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| 38 | #define TIMERMR2Int 0x04 |
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| 39 | #define TIMERMR3Int 0x08 |
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| 40 | #define TIMERCR0Int 0x10 |
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| 41 | #define TIMERCR1Int 0x20 |
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| 42 | #define TIMERCR2Int 0x40 |
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| 43 | #define TIMERCR3Int 0x80 |
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| 44 | |
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| 45 | #define TIMERALLInt 0xFF |
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| 46 | |
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| 47 | #endif //__LPC_Timer_H |
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| 48 | |
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