source: rtems/bsps/arm/raspberrypi/start/bspstarthooks.c @ 65e59cc

Last change on this file since 65e59cc was 65e59cc, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 24, 2018 at 4:37:06 AM

bsps/arm: Move bsp_memory_management_initialize()

This function is only used by the raspberrypi BSP.

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup arm_start
5 *
6 * @brief Rasberry Pi startup code.
7 */
8
9/*
10 * Copyright (c) 2013. Hesham AL-Matary
11 * Copyright (c) 2013 by Alan Cudmore
12 * based on work by:
13 * Copyright (c) 2009
14 * embedded brains GmbH
15 * Obere Lagerstr. 30
16 * D-82178 Puchheim
17 * Germany
18 * <rtems@embedded-brains.de>
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.org/license/LICENSE
23 */
24
25#include <bspopts.h>
26#include <bsp/start.h>
27#include <bsp/raspberrypi.h>
28#include <libcpu/arm-cp15.h>
29#include <bsp.h>
30#include <bsp/linker-symbols.h>
31#include <bsp/arm-cp15-start.h>
32
33#ifdef RTEMS_SMP
34#include <rtems/score/smp.h>
35#endif
36
37void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
38{
39  uint32_t sctlr_val;
40#ifdef RTEMS_SMP
41  uint32_t cpu_index_self = _SMP_Get_current_processor();
42#endif /* RTEMS_SMP */
43
44  sctlr_val = arm_cp15_get_control();
45
46  /*
47   * Current U-boot loader seems to start kernel image
48   * with I and D caches on and MMU enabled.
49   * If RTEMS application image finds that cache is on
50   * during startup then disable caches.
51   */
52  if (sctlr_val & (ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
53    if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
54      /*
55       * If the data cache is on then ensure that it is clean
56       * before switching off to be extra carefull.
57       */
58#ifdef RTEMS_SMP
59      if (cpu_index_self != 0) {
60        arm_cp15_data_cache_clean_level(0);
61        arm_cp15_cache_invalidate_level(0, 0);
62      } else
63#endif /* RTEMS_SMP */
64      {
65        rtems_cache_flush_entire_data();
66        rtems_cache_invalidate_entire_data();
67      }
68    }
69    arm_cp15_flush_prefetch_buffer();
70    sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
71    arm_cp15_set_control(sctlr_val);
72  }
73#ifdef RTEMS_SMP
74  if (cpu_index_self != 0) {
75    arm_cp15_cache_invalidate_level(0, 0);
76  } else
77#endif /* RTEMS_SMP */
78  {
79    rtems_cache_invalidate_entire_data();
80  }
81  rtems_cache_invalidate_entire_instruction();
82  arm_cp15_branch_predictor_invalidate_all();
83  arm_cp15_tlb_invalidate();
84  arm_cp15_flush_prefetch_buffer();
85
86  /* Clear Translation Table Base Control Register */
87  arm_cp15_set_translation_table_base_control_register(0);
88
89  /* Clear Secure or Non-secure Vector Base Address Register */
90  arm_cp15_set_vector_base_address(0);
91
92#ifdef RTEMS_SMP
93  if (cpu_index_self == 0) {
94    rpi_ipi_initialize();
95  } else {
96    rpi_start_rtems_on_secondary_processor();
97  }
98#endif
99}
100
101BSP_START_TEXT_SECTION static void bsp_memory_management_initialize(void)
102{
103  uint32_t ctrl = arm_cp15_get_control();
104
105  ctrl |= ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_S | ARM_CP15_CTRL_XP;
106
107  arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
108    ctrl,
109    (uint32_t *) bsp_translation_table_base,
110    ARM_MMU_DEFAULT_CLIENT_DOMAIN,
111    &arm_cp15_start_mmu_config_table[0],
112    arm_cp15_start_mmu_config_table_size
113  );
114}
115
116void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
117{
118  bsp_start_copy_sections();
119  bsp_memory_management_initialize();
120  bsp_start_clear_bss();
121
122  rpi_video_init();
123}
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