1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup raspberrypi_gpio |
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5 | * |
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6 | * @brief Support for the Raspberry PI GPIO. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2014-2015 Andre Marques <andre.lousa.marques at gmail.com> |
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11 | * |
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12 | * The license and distribution terms for this file may be |
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13 | * found in the file LICENSE in this distribution or at |
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14 | * http://www.rtems.org/license/LICENSE. |
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15 | */ |
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16 | |
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17 | #include <bsp.h> |
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18 | #include <bsp/raspberrypi.h> |
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19 | #include <bsp/irq-generic.h> |
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20 | #include <bsp/gpio.h> |
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21 | #include <bsp/rpi-gpio.h> |
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22 | |
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23 | #include <stdlib.h> |
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24 | |
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25 | RTEMS_INTERRUPT_LOCK_DEFINE( static, rtems_gpio_bsp_lock, "rtems_gpio_bsp_lock" ); |
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26 | |
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27 | /* Calculates a bitmask to assign an alternate function to a given pin. */ |
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28 | #define SELECT_PIN_FUNCTION(fn, pn) (fn << ((pn % 10) * 3)) |
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29 | |
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30 | rtems_gpio_specific_data alt_func_def[] = { |
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31 | {.io_function = RPI_ALT_FUNC_0, .pin_data = NULL}, |
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32 | {.io_function = RPI_ALT_FUNC_1, .pin_data = NULL}, |
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33 | {.io_function = RPI_ALT_FUNC_2, .pin_data = NULL}, |
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34 | {.io_function = RPI_ALT_FUNC_3, .pin_data = NULL}, |
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35 | {.io_function = RPI_ALT_FUNC_4, .pin_data = NULL}, |
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36 | {.io_function = RPI_ALT_FUNC_5, .pin_data = NULL} |
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37 | }; |
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38 | |
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39 | /* Raspberry Pi 1 Revision 2 gpio interface definitions. */ |
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40 | #include "gpio-interfaces-pi1-rev2.c" |
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41 | |
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42 | /* Waits a number of CPU cycles. */ |
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43 | static void arm_delay(uint8_t cycles) |
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44 | { |
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45 | uint8_t i; |
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46 | |
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47 | for ( i = 0; i < cycles; ++i ) { |
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48 | asm volatile("nop"); |
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49 | } |
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50 | } |
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51 | |
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52 | static rtems_status_code rpi_select_pin_function( |
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53 | uint32_t bank, |
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54 | uint32_t pin, |
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55 | uint32_t type |
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56 | ) { |
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57 | /* Calculate the pin function select register address. */ |
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58 | volatile uint32_t *pin_addr = (uint32_t *) BCM2835_GPIO_REGS_BASE + |
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59 | (pin / 10); |
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60 | uint32_t reg_old; |
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61 | uint32_t reg_new; |
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62 | rtems_interrupt_lock_context lock_context; |
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63 | |
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64 | rtems_interrupt_lock_acquire(&rtems_gpio_bsp_lock, &lock_context); |
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65 | reg_new = reg_old = *pin_addr; |
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66 | reg_new &= ~SELECT_PIN_FUNCTION(RPI_ALT_FUNC_MASK, pin); |
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67 | reg_new |= SELECT_PIN_FUNCTION(type, pin); |
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68 | *pin_addr = reg_new; |
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69 | rtems_interrupt_lock_release(&rtems_gpio_bsp_lock, &lock_context); |
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70 | |
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71 | return RTEMS_SUCCESSFUL; |
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72 | } |
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73 | |
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74 | rtems_status_code rtems_gpio_bsp_multi_set(uint32_t bank, uint32_t bitmask) |
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75 | { |
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76 | BCM2835_REG(BCM2835_GPIO_GPSET0) = bitmask; |
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77 | |
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78 | return RTEMS_SUCCESSFUL; |
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79 | } |
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80 | |
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81 | rtems_status_code rtems_gpio_bsp_multi_clear(uint32_t bank, uint32_t bitmask) |
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82 | { |
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83 | BCM2835_REG(BCM2835_GPIO_GPCLR0) = bitmask; |
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84 | |
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85 | return RTEMS_SUCCESSFUL; |
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86 | } |
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87 | |
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88 | uint32_t rtems_gpio_bsp_multi_read(uint32_t bank, uint32_t bitmask) |
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89 | { |
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90 | return (BCM2835_REG(BCM2835_GPIO_GPLEV0) & bitmask); |
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91 | } |
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92 | |
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93 | rtems_status_code rtems_gpio_bsp_set(uint32_t bank, uint32_t pin) |
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94 | { |
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95 | BCM2835_REG(BCM2835_GPIO_GPSET0) = (1 << pin); |
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96 | |
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97 | return RTEMS_SUCCESSFUL; |
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98 | } |
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99 | |
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100 | rtems_status_code rtems_gpio_bsp_clear(uint32_t bank, uint32_t pin) |
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101 | { |
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102 | BCM2835_REG(BCM2835_GPIO_GPCLR0) = (1 << pin); |
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103 | |
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104 | return RTEMS_SUCCESSFUL; |
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105 | } |
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106 | |
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107 | uint32_t rtems_gpio_bsp_get_value(uint32_t bank, uint32_t pin) |
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108 | { |
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109 | return (BCM2835_REG(BCM2835_GPIO_GPLEV0) & (1 << pin)); |
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110 | } |
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111 | |
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112 | rtems_status_code rtems_gpio_bsp_select_input( |
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113 | uint32_t bank, |
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114 | uint32_t pin, |
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115 | void *bsp_specific |
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116 | ) { |
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117 | return rpi_select_pin_function(bank, pin, RPI_DIGITAL_IN); |
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118 | } |
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119 | |
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120 | rtems_status_code rtems_gpio_bsp_select_output( |
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121 | uint32_t bank, |
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122 | uint32_t pin, |
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123 | void *bsp_specific |
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124 | ) { |
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125 | return rpi_select_pin_function(bank, pin, RPI_DIGITAL_OUT); |
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126 | } |
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127 | |
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128 | rtems_status_code rtems_gpio_bsp_select_specific_io( |
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129 | uint32_t bank, |
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130 | uint32_t pin, |
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131 | uint32_t function, |
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132 | void *pin_data |
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133 | ) { |
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134 | return rpi_select_pin_function(bank, pin, function); |
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135 | } |
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136 | |
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137 | rtems_status_code rtems_gpio_bsp_set_resistor_mode( |
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138 | uint32_t bank, |
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139 | uint32_t pin, |
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140 | rtems_gpio_pull_mode mode |
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141 | ) { |
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142 | /* Set control signal. */ |
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143 | switch ( mode ) { |
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144 | case PULL_UP: |
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145 | BCM2835_REG(BCM2835_GPIO_GPPUD) = (1 << 1); |
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146 | break; |
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147 | case PULL_DOWN: |
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148 | BCM2835_REG(BCM2835_GPIO_GPPUD) = (1 << 0); |
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149 | break; |
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150 | case NO_PULL_RESISTOR: |
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151 | BCM2835_REG(BCM2835_GPIO_GPPUD) = 0; |
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152 | break; |
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153 | default: |
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154 | return RTEMS_UNSATISFIED; |
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155 | } |
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156 | |
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157 | /* Wait 150 cyles, as per BCM2835 documentation. */ |
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158 | arm_delay(150); |
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159 | |
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160 | /* Setup clock for the control signal. */ |
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161 | BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = (1 << pin); |
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162 | |
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163 | arm_delay(150); |
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164 | |
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165 | /* Remove the control signal. */ |
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166 | BCM2835_REG(BCM2835_GPIO_GPPUD) = 0; |
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167 | |
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168 | /* Remove the clock. */ |
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169 | BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = 0; |
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170 | |
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171 | return RTEMS_SUCCESSFUL; |
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172 | } |
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173 | |
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174 | rtems_vector_number rtems_gpio_bsp_get_vector(uint32_t bank) |
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175 | { |
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176 | return BCM2835_IRQ_ID_GPIO_0; |
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177 | } |
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178 | |
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179 | uint32_t rtems_gpio_bsp_interrupt_line(rtems_vector_number vector) |
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180 | { |
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181 | uint32_t event_status; |
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182 | |
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183 | /* Retrieve the interrupt event status. */ |
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184 | event_status = BCM2835_REG(BCM2835_GPIO_GPEDS0); |
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185 | |
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186 | /* Clear the interrupt line. */ |
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187 | BCM2835_REG(BCM2835_GPIO_GPEDS0) = event_status; |
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188 | |
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189 | return event_status; |
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190 | } |
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191 | |
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192 | rtems_status_code rtems_gpio_bsp_enable_interrupt( |
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193 | uint32_t bank, |
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194 | uint32_t pin, |
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195 | rtems_gpio_interrupt interrupt |
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196 | ) { |
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197 | switch ( interrupt ) { |
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198 | case FALLING_EDGE: |
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199 | /* Enables asynchronous falling edge detection. */ |
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200 | BCM2835_REG(BCM2835_GPIO_GPAFEN0) |= (1 << pin); |
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201 | break; |
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202 | case RISING_EDGE: |
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203 | /* Enables asynchronous rising edge detection. */ |
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204 | BCM2835_REG(BCM2835_GPIO_GPAREN0) |= (1 << pin); |
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205 | break; |
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206 | case BOTH_EDGES: |
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207 | /* Enables asynchronous falling edge detection. */ |
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208 | BCM2835_REG(BCM2835_GPIO_GPAFEN0) |= (1 << pin); |
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209 | |
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210 | /* Enables asynchronous rising edge detection. */ |
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211 | BCM2835_REG(BCM2835_GPIO_GPAREN0) |= (1 << pin); |
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212 | break; |
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213 | case LOW_LEVEL: |
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214 | /* Enables pin low level detection. */ |
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215 | BCM2835_REG(BCM2835_GPIO_GPLEN0) |= (1 << pin); |
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216 | break; |
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217 | case HIGH_LEVEL: |
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218 | /* Enables pin high level detection. */ |
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219 | BCM2835_REG(BCM2835_GPIO_GPHEN0) |= (1 << pin); |
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220 | break; |
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221 | case BOTH_LEVELS: |
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222 | /* Enables pin low level detection. */ |
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223 | BCM2835_REG(BCM2835_GPIO_GPLEN0) |= (1 << pin); |
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224 | |
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225 | /* Enables pin high level detection. */ |
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226 | BCM2835_REG(BCM2835_GPIO_GPHEN0) |= (1 << pin); |
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227 | break; |
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228 | case NONE: |
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229 | default: |
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230 | return RTEMS_UNSATISFIED; |
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231 | } |
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232 | |
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233 | return RTEMS_SUCCESSFUL; |
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234 | } |
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235 | |
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236 | rtems_status_code rtems_gpio_bsp_disable_interrupt( |
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237 | uint32_t bank, |
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238 | uint32_t pin, |
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239 | rtems_gpio_interrupt interrupt |
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240 | ) { |
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241 | switch ( interrupt ) { |
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242 | case FALLING_EDGE: |
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243 | /* Disables asynchronous falling edge detection. */ |
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244 | BCM2835_REG(BCM2835_GPIO_GPAFEN0) &= ~(1 << pin); |
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245 | break; |
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246 | case RISING_EDGE: |
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247 | /* Disables asynchronous rising edge detection. */ |
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248 | BCM2835_REG(BCM2835_GPIO_GPAREN0) &= ~(1 << pin); |
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249 | break; |
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250 | case BOTH_EDGES: |
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251 | /* Disables asynchronous falling edge detection. */ |
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252 | BCM2835_REG(BCM2835_GPIO_GPAFEN0) &= ~(1 << pin); |
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253 | |
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254 | /* Disables asynchronous rising edge detection. */ |
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255 | BCM2835_REG(BCM2835_GPIO_GPAREN0) &= ~(1 << pin); |
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256 | break; |
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257 | case LOW_LEVEL: |
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258 | /* Disables pin low level detection. */ |
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259 | BCM2835_REG(BCM2835_GPIO_GPLEN0) &= ~(1 << pin); |
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260 | break; |
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261 | case HIGH_LEVEL: |
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262 | /* Disables pin high level detection. */ |
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263 | BCM2835_REG(BCM2835_GPIO_GPHEN0) &= ~(1 << pin); |
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264 | break; |
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265 | case BOTH_LEVELS: |
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266 | /* Disables pin low level detection. */ |
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267 | BCM2835_REG(BCM2835_GPIO_GPLEN0) &= ~(1 << pin); |
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268 | |
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269 | /* Disables pin high level detection. */ |
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270 | BCM2835_REG(BCM2835_GPIO_GPHEN0) &= ~(1 << pin); |
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271 | break; |
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272 | case NONE: |
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273 | default: |
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274 | return RTEMS_UNSATISFIED; |
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275 | } |
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276 | |
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277 | return RTEMS_SUCCESSFUL; |
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278 | } |
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279 | |
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280 | rtems_status_code rpi_gpio_select_jtag(void) |
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281 | { |
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282 | return rtems_gpio_multi_select(jtag_config, JTAG_PIN_COUNT); |
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283 | } |
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284 | |
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285 | rtems_status_code rpi_gpio_select_spi(void) |
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286 | { |
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287 | return rtems_gpio_multi_select(spi_config, SPI_PIN_COUNT); |
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288 | } |
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289 | |
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290 | rtems_status_code rpi_gpio_select_i2c(void) |
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291 | { |
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292 | return rtems_gpio_multi_select(i2c_config, I2C_PIN_COUNT); |
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293 | } |
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294 | |
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295 | rtems_status_code rtems_gpio_bsp_multi_select( |
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296 | rtems_gpio_multiple_pin_select *pins, |
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297 | uint32_t pin_count, |
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298 | uint32_t select_bank |
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299 | ) { |
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300 | uint32_t register_address; |
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301 | uint32_t select_register; |
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302 | uint8_t i; |
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303 | |
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304 | register_address = BCM2835_GPIO_REGS_BASE + (select_bank * 0x04); |
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305 | |
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306 | select_register = BCM2835_REG(register_address); |
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307 | |
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308 | for ( i = 0; i < pin_count; ++i ) { |
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309 | if ( pins[i].function == DIGITAL_INPUT ) { |
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310 | select_register &= |
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311 | ~SELECT_PIN_FUNCTION(RPI_DIGITAL_IN, pins[i].pin_number); |
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312 | } |
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313 | else if ( pins[i].function == DIGITAL_OUTPUT ) { |
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314 | select_register |= |
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315 | SELECT_PIN_FUNCTION(RPI_DIGITAL_OUT, pins[i].pin_number); |
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316 | } |
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317 | else { /* BSP_SPECIFIC function. */ |
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318 | select_register |= |
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319 | SELECT_PIN_FUNCTION(pins[i].io_function, pins[i].pin_number); |
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320 | } |
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321 | } |
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322 | |
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323 | BCM2835_REG(register_address) = select_register; |
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324 | |
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325 | return RTEMS_SUCCESSFUL; |
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326 | } |
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327 | |
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328 | rtems_status_code rtems_gpio_bsp_specific_group_operation( |
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329 | uint32_t bank, |
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330 | uint32_t *pins, |
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331 | uint32_t pin_count, |
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332 | void *arg |
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333 | ) { |
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334 | return RTEMS_NOT_DEFINED; |
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335 | } |
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