source: rtems/bsps/arm/lpc32xx/start/emc.c

Last change on this file was bcef89f2, checked in by Sebastian Huber <sebastian.huber@…>, on 05/19/23 at 06:18:25

Update company name

The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.

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File size: 4.0 KB
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/**
4 * @file
5 *
6 * @ingroup lpc32xx_emc
7 *
8 * @brief EMC support implementation.
9 */
10
11/*
12 * Copyright (c) 2010 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 *    notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 *    notice, this list of conditions and the following disclaimer in the
21 *    documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#include <bsp/emc.h>
37
38#include <bsp.h>
39#include <bsp/mmu.h>
40
41static volatile lpc_emc *const emc = &lpc32xx.emc;
42
43static volatile lpc32xx_emc_ahb *const emc_ahb = &lpc32xx.emc_ahb [0];
44
45static void dynamic_init(const lpc32xx_emc_dynamic_config *cfg)
46{
47  uint32_t chip_begin = LPC32XX_BASE_EMC_DYCS_0;
48  uint32_t dynamiccontrol = (cfg->control | EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS)
49    & ~EMC_DYN_CTRL_I_MASK;
50  size_t i = 0;
51
52  LPC32XX_SDRAMCLK_CTRL = cfg->sdramclk_ctrl;
53
54  emc->dynamicreadconfig = cfg->readconfig;
55
56  /* Timings */
57  emc->dynamictrp = cfg->trp;
58  emc->dynamictras = cfg->tras;
59  emc->dynamictsrex = cfg->tsrex;
60  emc->dynamictwr = cfg->twr;
61  emc->dynamictrc = cfg->trc;
62  emc->dynamictrfc = cfg->trfc;
63  emc->dynamictxsr = cfg->txsr;
64  emc->dynamictrrd = cfg->trrd;
65  emc->dynamictmrd = cfg->tmrd;
66  emc->dynamictcdlr = cfg->tcdlr;
67  for (i = 0; i < EMC_DYN_CHIP_COUNT; ++i) {
68    if (cfg->chip [i].size != 0) {
69      emc->dynamic [i].config = cfg->chip [i].config;
70      emc->dynamic [i].rascas = cfg->chip [i].rascas;
71    }
72  }
73
74  /* NOP period */
75  emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_NOP;
76  lpc32xx_micro_seconds_delay(cfg->nop_time_in_us);
77
78  /* Precharge */
79  emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_PALL;
80  emc->dynamicrefresh = 1;
81  /* FIXME: Why a delay, why this value? */
82  lpc32xx_micro_seconds_delay(10);
83
84  /* Refresh timing */
85  emc->dynamicrefresh = cfg->refresh;
86  /* FIXME: Why a delay, why this value? */
87  lpc32xx_micro_seconds_delay(16);
88
89  /* Set modes */
90  for (i = 0; i < EMC_DYN_CHIP_COUNT; ++i) {
91    if (cfg->chip [i].size != 0) {
92      lpc32xx_set_translation_table_entries(
93        (void *) chip_begin,
94        (void *) (chip_begin + cfg->chip [i].size),
95        LPC32XX_MMU_READ_WRITE
96      );
97      emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
98      *(volatile uint32_t *)(chip_begin + cfg->chip [i].mode);
99      emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
100      *(volatile uint32_t *)(chip_begin + cfg->chip [i].extmode);
101    }
102    chip_begin += 0x20000000;
103  }
104
105  emc->dynamiccontrol = cfg->control;
106}
107
108void lpc32xx_emc_init(const lpc32xx_emc_dynamic_config *dyn_cfg)
109{
110  /* Enable buffers in AHB ports */
111  emc_ahb [0].control = EMC_AHB_PORT_BUFF_EN;
112  emc_ahb [3].control = EMC_AHB_PORT_BUFF_EN;
113  emc_ahb [4].control = EMC_AHB_PORT_BUFF_EN;
114
115  /* Set AHB port timeouts */
116  emc_ahb [0].timeout = EMC_AHB_TIMEOUT(32);
117  emc_ahb [3].timeout = EMC_AHB_TIMEOUT(32);
118  emc_ahb [4].timeout = EMC_AHB_TIMEOUT(32);
119
120  /* Enable EMC */
121  emc->control = EMC_CTRL_E,
122  emc->config = 0;
123
124  dynamic_init(dyn_cfg);
125}
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