1 | /* |
---|
2 | * Copyright (c) 2013 embedded brains GmbH. All rights reserved. |
---|
3 | * |
---|
4 | * embedded brains GmbH |
---|
5 | * Dornierstr. 4 |
---|
6 | * 82178 Puchheim |
---|
7 | * Germany |
---|
8 | * <info@embedded-brains.de> |
---|
9 | * |
---|
10 | * The license and distribution terms for this file may be |
---|
11 | * found in the file LICENSE in this distribution or at |
---|
12 | * http://www.rtems.org/license/LICENSE. |
---|
13 | */ |
---|
14 | |
---|
15 | #include <bsp/arm-pl111-fb.h> |
---|
16 | |
---|
17 | #include <bsp.h> |
---|
18 | #include <bsp/fatal.h> |
---|
19 | #include <bsp/io.h> |
---|
20 | #include <bsp/lcd.h> |
---|
21 | #include <bsp/lpc24xx.h> |
---|
22 | |
---|
23 | static const lpc24xx_pin_range tft_16_bit_5_6_5_pins[] = { |
---|
24 | LPC24XX_PIN_LCD_DCLK, |
---|
25 | LPC24XX_PIN_LCD_FP, |
---|
26 | LPC24XX_PIN_LCD_LP, |
---|
27 | LPC24XX_PIN_LCD_VD_3_P4_29, |
---|
28 | LPC24XX_PIN_LCD_VD_4_P2_6, |
---|
29 | LPC24XX_PIN_LCD_VD_5_P2_7, |
---|
30 | LPC24XX_PIN_LCD_VD_6_P2_8, |
---|
31 | LPC24XX_PIN_LCD_VD_7_P2_9, |
---|
32 | LPC24XX_PIN_LCD_VD_10_P1_20, |
---|
33 | LPC24XX_PIN_LCD_VD_11_P1_21, |
---|
34 | LPC24XX_PIN_LCD_VD_12_P1_22, |
---|
35 | LPC24XX_PIN_LCD_VD_13_P1_23, |
---|
36 | LPC24XX_PIN_LCD_VD_14_P1_24, |
---|
37 | LPC24XX_PIN_LCD_VD_15_P1_25, |
---|
38 | LPC24XX_PIN_LCD_VD_19_P2_13, |
---|
39 | LPC24XX_PIN_LCD_VD_20_P1_26, |
---|
40 | LPC24XX_PIN_LCD_VD_21_P1_27, |
---|
41 | LPC24XX_PIN_LCD_VD_22_P1_28, |
---|
42 | LPC24XX_PIN_LCD_VD_23_P1_29, |
---|
43 | LPC24XX_PIN_TERMINAL |
---|
44 | }; |
---|
45 | |
---|
46 | static void fb_set_up(const pl111_fb_config *cfg) |
---|
47 | { |
---|
48 | rtems_status_code sc; |
---|
49 | |
---|
50 | sc = lpc24xx_module_enable(LPC24XX_MODULE_LCD, LPC24XX_MODULE_PCLK_DEFAULT); |
---|
51 | if (sc != RTEMS_SUCCESSFUL) { |
---|
52 | bsp_fatal(LPC24XX_FATAL_PL111_SET_UP); |
---|
53 | } |
---|
54 | |
---|
55 | #ifdef ARM_MULTILIB_ARCH_V4 |
---|
56 | PINSEL11 = BSP_FLD32(LCD_MODE_TFT_16_BIT_5_6_5, 1, 3) | BSP_BIT32(0); |
---|
57 | #endif |
---|
58 | |
---|
59 | #ifdef ARM_MULTILIB_ARCH_V7M |
---|
60 | volatile lpc17xx_scb *scb = &LPC17XX_SCB; |
---|
61 | |
---|
62 | scb->matrixarb = 0x0c09; |
---|
63 | #endif |
---|
64 | } |
---|
65 | |
---|
66 | static void fb_pins_set_up(const pl111_fb_config *cfg) |
---|
67 | { |
---|
68 | rtems_status_code sc; |
---|
69 | |
---|
70 | sc = lpc24xx_pin_config(tft_16_bit_5_6_5_pins, LPC24XX_PIN_SET_FUNCTION); |
---|
71 | if (sc != RTEMS_SUCCESSFUL) { |
---|
72 | bsp_fatal(LPC24XX_FATAL_PL111_PINS_SET_UP); |
---|
73 | } |
---|
74 | } |
---|
75 | |
---|
76 | static void fb_pins_tear_down(const pl111_fb_config *cfg) |
---|
77 | { |
---|
78 | rtems_status_code sc; |
---|
79 | |
---|
80 | sc = lpc24xx_pin_config(tft_16_bit_5_6_5_pins, LPC24XX_PIN_SET_INPUT); |
---|
81 | if (sc != RTEMS_SUCCESSFUL) { |
---|
82 | bsp_fatal(LPC24XX_FATAL_PL111_PINS_TEAR_DOWN); |
---|
83 | } |
---|
84 | } |
---|
85 | |
---|
86 | static void fb_tear_down(const pl111_fb_config *cfg) |
---|
87 | { |
---|
88 | rtems_status_code sc; |
---|
89 | |
---|
90 | #ifdef ARM_MULTILIB_ARCH_V4 |
---|
91 | PINSEL11 = 0; |
---|
92 | #endif |
---|
93 | |
---|
94 | sc = lpc24xx_module_disable(LPC24XX_MODULE_LCD); |
---|
95 | if (sc != RTEMS_SUCCESSFUL) { |
---|
96 | bsp_fatal(LPC24XX_FATAL_PL111_TEAR_DOWN); |
---|
97 | } |
---|
98 | } |
---|
99 | |
---|
100 | static const pl111_fb_config fb_config = { |
---|
101 | .regs = (volatile pl111 *) LCD_BASE_ADDR, |
---|
102 | |
---|
103 | .timing0 = PL111_LCD_TIMING0_PPL(640 / 16 - 1) |
---|
104 | | PL111_LCD_TIMING0_HSW(0x1d) |
---|
105 | | PL111_LCD_TIMING0_HFP(0x0f) |
---|
106 | | PL111_LCD_TIMING0_HBP(0x71), |
---|
107 | .timing1 = PL111_LCD_TIMING1_LPP(480 - 1) |
---|
108 | | PL111_LCD_TIMING1_VSW(0x02) |
---|
109 | | PL111_LCD_TIMING1_VFP(0x0a) |
---|
110 | | PL111_LCD_TIMING1_VBP(0x20), |
---|
111 | .timing2 = PL111_LCD_TIMING2_PCD_LO(0x3) |
---|
112 | | PL111_LCD_TIMING2_ACB(0x0) |
---|
113 | | PL111_LCD_TIMING2_IVS |
---|
114 | | PL111_LCD_TIMING2_IHS |
---|
115 | | PL111_LCD_TIMING2_IPC |
---|
116 | | PL111_LCD_TIMING2_CPL(640 - 1) |
---|
117 | | PL111_LCD_TIMING2_PCD_HI(0x0), |
---|
118 | .timing3 = 0x0, |
---|
119 | .control = PL111_LCD_CONTROL_LCD_TFT |
---|
120 | | PL111_LCD_CONTROL_LCD_BPP(PL111_LCD_CONTROL_LCD_BPP_16) |
---|
121 | | PL111_LCD_CONTROL_BGR, |
---|
122 | .power_delay_in_us = 100000, |
---|
123 | |
---|
124 | .set_up = fb_set_up, |
---|
125 | .pins_set_up = fb_pins_set_up, |
---|
126 | .pins_tear_down = fb_pins_tear_down, |
---|
127 | .tear_down = fb_tear_down |
---|
128 | }; |
---|
129 | |
---|
130 | const pl111_fb_config *arm_pl111_fb_get_config(void) |
---|
131 | { |
---|
132 | return &fb_config; |
---|
133 | } |
---|