source: rtems/bsps/arm/lpc176x/start/system-clocks.c

Last change on this file was bcef89f2, checked in by Sebastian Huber <sebastian.huber@…>, on 05/19/23 at 06:18:25

Update company name

The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.

  • Property mode set to 100644
File size: 3.7 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/**
4 * @file
5 *
6 * @ingroup RTEMSBSPsARMLPC176X_clocks
7 *
8 * @brief System clocks.
9 */
10
11/*
12 * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 *    notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 *    notice, this list of conditions and the following disclaimer in the
21 *    documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#include <bsp.h>
37#include <bsp/system-clocks.h>
38
39/**
40 * @brief Internal RC oscillator frequency in [Hz].
41 */
42#define LPC176X_OSCILLATOR_INTERNAL 4000000u
43
44#ifndef LPC176X_OSCILLATOR_MAIN
45#error "unknown main oscillator frequency"
46#endif
47
48#ifndef LPC176X_OSCILLATOR_RTC
49#error "unknown RTC oscillator frequency"
50#endif
51
52inline unsigned lpc176x_sysclk( void );
53
54void lpc176x_timer_initialize( void )
55{
56  /* Reset timer */
57  LPC176X_T1TCR = TCR_RST;
58  /* Set timer mode */
59  LPC176X_T1CTCR = 0u;
60  /* Set prescaler to zero */
61  LPC176X_T1PR = 0u;
62  /* Reset all interrupt flags */
63  LPC176X_T1IR = 0xffU;
64  /* Do not stop on a match */
65  LPC176X_T1MCR = 0u;
66  /* No captures */
67  LPC176X_T1CCR = 0u;
68  /* Start timer */
69  LPC176X_T1TCR = TCR_EN;
70}
71
72void lpc176x_micro_seconds_delay( const unsigned us )
73{
74  const unsigned start = lpc176x_get_timer1();
75  const unsigned delay = us * ( LPC176X_PCLK / 1000000u );
76  unsigned       elapsed = 0u;
77
78  do {
79    elapsed = lpc176x_get_timer1() - start;
80  } while ( elapsed < delay );
81}
82
83unsigned lpc176x_sysclk( void )
84{
85  return ( LPC176X_SCB.clksrcsel & LPC176X_SCB_CLKSRCSEL_CLKSRC ) != 0u ?
86         LPC176X_OSCILLATOR_MAIN : LPC176X_OSCILLATOR_INTERNAL;
87}
88
89unsigned lpc176x_pllclk( void )
90{
91  const unsigned sysclk = lpc176x_sysclk();
92  const unsigned pllstat = ( LPC176X_SCB.pll_0 ).stat;
93  const unsigned enabled_and_locked = LPC176X_PLL_STAT_PLLE |
94                                      LPC176X_PLL_STAT_PLOCK;
95  unsigned pllclk = 0u;
96
97  if ( ( pllstat & enabled_and_locked ) == enabled_and_locked ) {
98    unsigned m = LPC176X_PLL_SEL_MSEL_GET( pllstat ) + 1u;
99    pllclk = sysclk * m;
100  }
101
102  /* else implies that the pllstat is unlocked. Also,
103     there is nothing to do. */
104
105  return pllclk;
106}
107
108unsigned lpc176x_cclk( void )
109{
110  const unsigned cclksel = LPC176X_SCB.cclksel;
111  unsigned       cclk_in = 0u;
112  unsigned       cclk = 0u;
113
114  if ( ( cclksel & LPC176X_SCB_CCLKSEL_CCLKSEL ) != 0u ) {
115    cclk_in = lpc176x_pllclk();
116  } else {
117    cclk_in = lpc176x_sysclk();
118  }
119
120  cclk = cclk_in / LPC176X_SCB_CCLKSEL_CCLKDIV_GET( cclksel );
121
122  return cclk;
123}
124
125uint32_t _CPU_Counter_frequency(void)
126{
127  return LPC176X_PCLK;
128}
129
130CPU_Counter_ticks _CPU_Counter_read( void )
131{
132  return lpc176x_get_timer1();
133}
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