1 | /** |
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2 | * @file lpc-gpio.c |
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3 | * |
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4 | * @ingroup lpc176x |
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5 | * |
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6 | * @brief GPIO library for the lpc176x bsp. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2014 Taller Technologies. |
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11 | * |
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12 | * @author Boretto Martin (martin.boretto@tallertechnologies.com) |
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13 | * @author Diaz Marcos (marcos.diaz@tallertechnologies.com) |
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14 | * @author Lenarduzzi Federico (federico.lenarduzzi@tallertechnologies.com) |
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15 | * @author Daniel Chicco (daniel.chicco@tallertechnologies.com) |
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16 | * |
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17 | * The license and distribution terms for this file may be |
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18 | * found in the file LICENSE in this distribution or at |
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19 | * http://www.rtems.org/license/LICENSE. |
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20 | */ |
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21 | |
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22 | #include <assert.h> |
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23 | #include <bsp/irq.h> |
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24 | #include <bsp/io.h> |
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25 | #include <bsp/lpc-gpio.h> |
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26 | #include <rtems/status-checks.h> |
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27 | |
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28 | static uint32_t function_vector_size = 0u; |
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29 | static lpc176x_registered_interrupt_function function_vector[ |
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30 | LPC176X_RESERVED_ISR_FUNCT_SIZE ]; |
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31 | static bool isr_installed = false; |
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32 | |
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33 | rtems_status_code lpc176x_gpio_config( |
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34 | const lpc176x_pin_number pin, |
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35 | const lpc176x_gpio_direction dir |
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36 | ) |
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37 | { |
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38 | rtems_status_code status_code = RTEMS_INVALID_NUMBER; |
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39 | |
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40 | if ( ( pin < LPC176X_MAX_PORT_NUMBER ) && |
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41 | ( dir < LPC176X_GPIO_FUNCTION_COUNT ) ) { |
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42 | const lpc176x_gpio_ports port = LPC176X_IO_PORT( pin ); |
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43 | const uint32_t pin_of_port = LPC176X_IO_PORT_BIT( pin ); |
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44 | |
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45 | lpc176x_pin_select( pin, LPC176X_PIN_FUNCTION_00 ); |
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46 | |
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47 | LPC176X_SET_BIT( LPC176X_FIO[ port ].dir, pin_of_port, dir ); |
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48 | |
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49 | status_code = RTEMS_SUCCESSFUL; |
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50 | } |
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51 | |
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52 | /* else implies that the pin or the egde are out of range. Also, |
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53 | an invalid number is returned. */ |
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54 | |
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55 | return status_code; |
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56 | } |
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57 | |
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58 | /** |
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59 | * @brief Check for a rising edge and call the interrupt function. |
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60 | * |
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61 | * @param statR Rising edge interrupt. |
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62 | * @param pin The pin to check. |
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63 | * @param registered_isr_function Interrupt to check. |
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64 | * @return TRUE if is a rising edge. FALSE otherwise. |
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65 | */ |
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66 | static bool lpc176x_check_rising_edge_and_call( |
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67 | const uint32_t statR, |
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68 | const lpc176x_registered_interrupt_function registered_isr_function, |
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69 | const uint32_t pin |
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70 | ) |
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71 | { |
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72 | bool is_rising = false; |
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73 | |
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74 | if ( statR & LPC176X_PIN_BIT( pin ) ) { |
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75 | registered_isr_function.function( registered_isr_function.pin, |
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76 | LPC176X_GPIO_INTERRUPT_RISING ); |
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77 | is_rising = true; |
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78 | } |
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79 | |
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80 | /* else implies that the current interrupt is not STATR. Also, |
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81 | there is nothing to do. */ |
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82 | |
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83 | return is_rising; |
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84 | } |
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85 | |
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86 | /** |
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87 | * @brief Check for a falling edge and call the interrupt function. |
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88 | * |
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89 | * @param statR Falling edge interrupt. |
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90 | * @param pin The pin to check. |
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91 | * @param registered_isr_function Interrupt to check. |
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92 | * @return TRUE if is a falling edge. FALSE otherwise. |
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93 | */ |
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94 | static bool lpc176x_check_falling_edge_and_call( |
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95 | const uint32_t statF, |
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96 | const lpc176x_registered_interrupt_function registered_isr_function, |
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97 | const uint32_t pin |
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98 | ) |
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99 | { |
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100 | bool is_falling = false; |
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101 | |
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102 | if ( statF & LPC176X_PIN_BIT( pin ) ) { |
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103 | registered_isr_function.function( registered_isr_function.pin, |
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104 | LPC176X_GPIO_INTERRUPT_FALLING ); |
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105 | is_falling = true; |
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106 | } |
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107 | |
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108 | /* else implies that the current interrupt is not STATF. Also, |
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109 | there is nothing to do. */ |
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110 | |
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111 | return is_falling; |
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112 | } |
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113 | |
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114 | /** |
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115 | * @brief Returns the interrupts base address according to the current port. |
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116 | * |
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117 | * @param port Input/Output port. |
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118 | * @return Interrupt base address. |
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119 | */ |
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120 | static lpc176x_interrupt_control*lpc176x_get_interrupt_address( |
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121 | const lpc176x_gpio_ports port ) |
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122 | { |
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123 | lpc176x_interrupt_control *interrupt; |
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124 | |
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125 | switch ( port ) { |
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126 | case ( LPC176X_GPIO_PORT_0 ): |
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127 | interrupt = (lpc176x_interrupt_control *) LPC176X_IO0_INT_BASE_ADDRESS; |
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128 | break; |
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129 | case ( LPC176X_GPIO_PORT_2 ): |
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130 | interrupt = (lpc176x_interrupt_control *) LPC176X_IO2_INT_BASE_ADDRESS; |
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131 | break; |
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132 | case ( LPC176X_GPIO_PORT_1 ): |
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133 | case ( LPC176X_GPIO_PORT_3 ): |
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134 | case ( LPC176X_GPIO_PORT_4 ): |
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135 | default: |
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136 | interrupt = NULL; |
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137 | } |
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138 | |
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139 | return interrupt; |
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140 | } |
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141 | |
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142 | /** |
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143 | * @brief Checks the type of the current interrupt. |
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144 | * |
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145 | * @param registered_isr_function Interrupt to check. |
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146 | */ |
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147 | static void check_for_interrupt( |
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148 | const lpc176x_registered_interrupt_function registered_isr_function ) |
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149 | { |
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150 | assert( registered_isr_function.pin < LPC176X_MAX_PORT_NUMBER ); |
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151 | |
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152 | const lpc176x_gpio_ports port = LPC176X_IO_PORT( |
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153 | registered_isr_function.pin ); |
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154 | const uint32_t pin = LPC176X_IO_PORT_BIT( registered_isr_function.pin ); |
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155 | |
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156 | lpc176x_interrupt_control *interrupt = lpc176x_get_interrupt_address( port ); |
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157 | assert( interrupt != NULL ); |
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158 | |
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159 | bool is_rising_edge = lpc176x_check_rising_edge_and_call( interrupt->StatR, |
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160 | registered_isr_function, |
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161 | pin ); |
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162 | |
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163 | bool is_falling_edge = lpc176x_check_falling_edge_and_call( interrupt->StatF, |
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164 | registered_isr_function, |
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165 | pin ); |
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166 | |
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167 | if ( is_rising_edge || is_falling_edge ) { |
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168 | interrupt->Clr = LPC176X_PIN_BIT( pin ); |
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169 | } |
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170 | |
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171 | /* else implies that the current interrupt is not CLR. Also, |
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172 | there is nothing to do. */ |
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173 | } |
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174 | |
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175 | /** |
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176 | * @brief Checks all interrupts types. |
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177 | * |
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178 | * @param arg Interrupt to check. |
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179 | */ |
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180 | static inline void lpc176x_gpio_isr( void *arg ) |
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181 | { |
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182 | unsigned int i; |
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183 | |
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184 | for ( i = 0; i < function_vector_size; ++i ) { |
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185 | check_for_interrupt( function_vector[ i ] ); |
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186 | } |
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187 | } |
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188 | |
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189 | /** |
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190 | * @brief Depending of the current edge sets rising/falling interrupt. |
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191 | * |
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192 | * @param edge Current edge. |
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193 | * @param pin_of_port Pin of the port to set the interrupt. |
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194 | * @param interrupt To enable the falling o rising edge. |
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195 | */ |
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196 | static void lpc176x_set_falling_or_rising_interrupt( |
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197 | const lpc176x_gpio_interrupt edge, |
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198 | const uint32_t pin_of_port, |
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199 | lpc176x_interrupt_control *interrupt |
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200 | ) |
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201 | { |
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202 | if ( edge & LPC176X_GPIO_INTERRUPT_RISING ) { |
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203 | LPC176X_SET_BIT( interrupt->EnR, pin_of_port, LPC176X_INT_ENABLE ); |
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204 | } |
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205 | |
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206 | /* else implies that it should not install the interrupt for a RISING edge. |
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207 | Also, there is nothing to do. */ |
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208 | |
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209 | if ( edge & LPC176X_GPIO_INTERRUPT_FALLING ) { |
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210 | LPC176X_SET_BIT( interrupt->EnF, pin_of_port, LPC176X_INT_ENABLE ); |
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211 | } |
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212 | |
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213 | /* else implies that it should not install the interrupt for a FALLING edge. |
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214 | Also, there is nothing to do. */ |
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215 | } |
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216 | |
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217 | /** |
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218 | * @brief Registers the pin and the callbacks functions. |
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219 | * |
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220 | * @param edge Current edge. |
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221 | * @param pin The pin to configure. |
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222 | * @param isr_funct Callback function to set. |
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223 | */ |
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224 | static void lpc176x_register_pin_and_callback( |
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225 | const lpc176x_gpio_interrupt edge, |
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226 | const lpc176x_pin_number pin, |
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227 | const lpc176x_gpio_interrupt_function isr_funct |
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228 | ) |
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229 | { |
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230 | if ( edge ) { |
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231 | assert( function_vector_size < LPC176X_RESERVED_ISR_FUNCT_SIZE ); |
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232 | function_vector[ function_vector_size ].function = isr_funct; |
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233 | function_vector[ function_vector_size ].pin = pin; |
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234 | ++function_vector_size; |
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235 | } |
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236 | |
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237 | /* else implies that the current interrupt is DISABLED or BOTH. Also, |
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238 | there is nothing to do. */ |
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239 | } |
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240 | |
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241 | /** |
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242 | * @brief Installs the interrupt handler. |
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243 | * |
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244 | * @param edge Which edge enable. |
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245 | * @return RTEMS_SUCCESSFUL if the installation was success. |
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246 | */ |
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247 | static rtems_status_code lpc176x_install_interrupt_handler( |
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248 | const lpc176x_gpio_interrupt edge ) |
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249 | { |
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250 | rtems_status_code status_code = RTEMS_SUCCESSFUL; |
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251 | |
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252 | if ( !isr_installed && edge ) { |
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253 | status_code = rtems_interrupt_handler_install( LPC176X_IRQ_EINT_3, |
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254 | "gpio_interrupt", |
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255 | RTEMS_INTERRUPT_UNIQUE, |
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256 | lpc176x_gpio_isr, |
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257 | NULL ); |
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258 | isr_installed = true; |
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259 | } |
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260 | |
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261 | /* else implies that the interrupts have been previously installed. Also, |
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262 | there is nothing to do. */ |
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263 | |
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264 | return status_code; |
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265 | } |
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266 | |
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267 | /** |
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268 | * @brief Configures the pin as input, enables interrupt for an |
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269 | * edge/s and sets isrfunct as the function to call when that |
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270 | * interrupt occurs. |
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271 | * |
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272 | * @param pin The pin to configure. |
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273 | * @param edge Which edge or edges will activate the interrupt. |
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274 | * @param isrfunct The function that is called when the interrupt occurs. |
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275 | * @return RTEMS_SUCCESSFUL if the configuration was success. |
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276 | */ |
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277 | static rtems_status_code lpc176x_check_edge_and_set_gpio_interrupts( |
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278 | const lpc176x_pin_number pin, |
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279 | const lpc176x_gpio_interrupt edge, |
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280 | const lpc176x_gpio_interrupt_function isr_funct |
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281 | ) |
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282 | { |
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283 | rtems_status_code status_code = RTEMS_SUCCESSFUL; |
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284 | |
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285 | const lpc176x_gpio_ports port = LPC176X_IO_PORT( pin ); |
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286 | const uint32_t pin_of_port = LPC176X_IO_PORT_BIT( pin ); |
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287 | |
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288 | lpc176x_interrupt_control *interrupt = lpc176x_get_interrupt_address( port ); |
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289 | |
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290 | assert( interrupt != NULL ); |
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291 | |
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292 | lpc176x_gpio_config( pin, LPC176X_GPIO_FUNCTION_INPUT ); |
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293 | |
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294 | lpc176x_set_falling_or_rising_interrupt( edge, pin_of_port, interrupt ); |
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295 | |
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296 | lpc176x_register_pin_and_callback( edge, pin, isr_funct ); |
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297 | |
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298 | status_code = lpc176x_install_interrupt_handler( edge ); |
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299 | |
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300 | return status_code; |
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301 | } |
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302 | |
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303 | rtems_status_code lpc176x_gpio_config_input_with_interrupt( |
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304 | const lpc176x_pin_number pin, |
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305 | const lpc176x_gpio_interrupt edge, |
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306 | const lpc176x_gpio_interrupt_function isr_funct |
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307 | ) |
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308 | { |
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309 | rtems_status_code status_code = RTEMS_INVALID_NUMBER; |
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310 | |
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311 | if ( ( pin < LPC176X_MAX_PORT_NUMBER ) |
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312 | && ( edge < LPC176X_GPIO_INTERRUPT_COUNT ) ) { |
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313 | status_code = lpc176x_check_edge_and_set_gpio_interrupts( pin, |
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314 | edge, |
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315 | isr_funct ); |
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316 | } |
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317 | |
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318 | /* else implies that the pin or the egde are out of range. Also, |
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319 | an invalid number is returned. */ |
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320 | |
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321 | return status_code; |
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322 | } |
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323 | |
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324 | rtems_status_code lpc176x_gpio_set_pin( const lpc176x_pin_number pin ) |
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325 | { |
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326 | rtems_status_code status_code = RTEMS_INVALID_NUMBER; |
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327 | |
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328 | if ( pin < LPC176X_MAX_PORT_NUMBER ) { |
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329 | const lpc176x_gpio_ports port = LPC176X_IO_PORT( pin ); |
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330 | const uint32_t pin_of_port = LPC176X_IO_PORT_BIT( pin ); |
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331 | |
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332 | LPC176X_FIO[ port ].set = LPC176X_PIN_BIT( pin_of_port ); |
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333 | |
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334 | status_code = RTEMS_SUCCESSFUL; |
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335 | } |
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336 | |
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337 | /* else implies that the pin or the egde are out of range. Also, |
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338 | an invalid number is returned. */ |
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339 | |
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340 | return status_code; |
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341 | } |
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342 | |
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343 | rtems_status_code lpc176x_gpio_clear_pin( const lpc176x_pin_number pin ) |
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344 | { |
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345 | rtems_status_code status_code = RTEMS_INVALID_NUMBER; |
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346 | |
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347 | if ( pin < LPC176X_MAX_PORT_NUMBER ) { |
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348 | const lpc176x_gpio_ports port = LPC176X_IO_PORT( pin ); |
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349 | const uint32_t pin_of_port = LPC176X_IO_PORT_BIT( pin ); |
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350 | |
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351 | LPC176X_FIO[ port ].clr = LPC176X_PIN_BIT( pin_of_port ); |
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352 | |
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353 | status_code = RTEMS_SUCCESSFUL; |
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354 | } |
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355 | |
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356 | /* else implies that the pin or the egde are out of range. Also, |
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357 | an invalid number is returned. */ |
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358 | |
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359 | return status_code; |
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360 | } |
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361 | |
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362 | rtems_status_code lpc176x_gpio_write_pin( |
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363 | const lpc176x_pin_number pin, |
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364 | const bool value |
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365 | ) |
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366 | { |
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367 | rtems_status_code status_code; |
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368 | |
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369 | if ( value ) { |
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370 | status_code = lpc176x_gpio_set_pin( pin ); |
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371 | } else { |
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372 | status_code = lpc176x_gpio_clear_pin( pin ); |
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373 | } |
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374 | |
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375 | return status_code; |
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376 | } |
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377 | |
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378 | inline rtems_status_code lpc176x_gpio_get_pin_value( |
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379 | const lpc176x_pin_number pin, |
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380 | bool *pin_value |
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381 | ) |
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382 | { |
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383 | assert( pin < LPC176X_MAX_PORT_NUMBER ); |
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384 | |
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385 | rtems_status_code status_code = RTEMS_SUCCESSFUL; |
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386 | |
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387 | const lpc176x_gpio_ports port = LPC176X_IO_PORT( pin ); |
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388 | const uint32_t pin_of_port = LPC176X_IO_PORT_BIT( pin ); |
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389 | *pin_value = ( LPC176X_FIO[ port ].pin & LPC176X_PIN_BIT( pin_of_port ) ); |
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390 | |
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391 | return status_code; |
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392 | } |
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