1 | /** |
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2 | * @file can.c |
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3 | * |
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4 | * @ingroup lpc176x |
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5 | * |
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6 | * @brief CAN controller for the mbed lpc1768 board. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2014 Taller Technologies. |
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11 | * |
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12 | * @author Diaz Marcos (marcos.diaz@tallertechnologies.com) |
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13 | * @author Daniel Chicco (daniel.chicco@tallertechnologies.com) |
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14 | * |
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15 | * The license and distribution terms for this file may be |
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16 | * found in the file LICENSE in this distribution or at |
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17 | * http://www.rtems.org/license/LICENSE. |
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18 | */ |
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19 | |
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20 | #include <rtems/status-checks.h> |
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21 | #include <bsp/irq.h> |
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22 | #include <bsp/can.h> |
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23 | #include <bsp/can-defs.h> |
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24 | #include <bsp/mbed-pinmap.h> |
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25 | #include <string.h> |
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26 | |
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27 | /** |
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28 | * @brief The standard isr to be installed for all the can devices. |
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29 | * |
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30 | * @param arg unused. |
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31 | */ |
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32 | static void can_isr( void *arg ); |
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33 | |
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34 | /** |
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35 | * @brief Vector of isr for the can_driver . |
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36 | */ |
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37 | lpc176x_can_isr_vector isr_vector; |
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38 | |
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39 | /** |
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40 | * @brief Represents all the can devices, and useful things for initialization. |
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41 | */ |
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42 | static const can_driver_entry can_driver_table[ CAN_DEVICES_NUMBER ] = |
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43 | { |
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44 | { |
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45 | .device = (can_device *) CAN1_BASE_ADDR, |
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46 | .module = LPC176X_MODULE_CAN_0, |
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47 | .pconp_pin = LPC176X_SCB_PCONP_CAN_1, |
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48 | .pins = { DIP9, DIP10 }, |
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49 | .pinfunction = LPC176X_PIN_FUNCTION_01 |
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50 | }, |
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51 | { |
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52 | .device = (can_device *) CAN2_BASE_ADDR, |
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53 | .module = LPC176X_MODULE_CAN_1, |
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54 | .pconp_pin = LPC176X_SCB_PCONP_CAN_2, |
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55 | .pins = { DIP30, DIP29 }, |
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56 | .pinfunction = LPC176X_PIN_FUNCTION_10 |
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57 | } |
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58 | }; |
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59 | |
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60 | /** |
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61 | * @brief The CAN acceptance filter. |
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62 | */ |
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63 | can_acceptance_filter *const acceptance_filter_device = |
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64 | (can_acceptance_filter *) CAN_ACCEPT_BASE_ADDR; |
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65 | |
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66 | /** |
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67 | * @brief Sets RX and TX pins for the passed can device number. |
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68 | * |
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69 | * @param cannumber CAN controller to be used. |
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70 | */ |
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71 | static inline void setpins( const lpc176x_can_number cannumber ) |
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72 | { |
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73 | const can_driver_entry *const can_driver = &can_driver_table[ cannumber ]; |
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74 | |
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75 | lpc176x_pin_select( can_driver->pins[ CAN_TX_PIN ], |
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76 | can_driver->pinfunction ); |
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77 | lpc176x_pin_select( can_driver->pins[ CAN_RX_PIN ], |
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78 | can_driver->pinfunction ); |
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79 | } |
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80 | |
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81 | rtems_status_code can_close( const lpc176x_can_number minor ) |
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82 | { |
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83 | rtems_status_code sc = RTEMS_INVALID_NUMBER; |
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84 | |
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85 | if ( CAN_DRIVER_IS_MINOR_VALID( minor ) ) { |
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86 | sc = RTEMS_SUCCESSFUL; |
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87 | const can_driver_entry *const can_driver = &can_driver_table[ minor ]; |
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88 | lpc176x_module_disable( can_driver->module ); |
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89 | } |
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90 | |
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91 | /*else wrong parameters. return RTEMS_INVALID_NUMBER*/ |
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92 | |
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93 | return sc; |
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94 | } |
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95 | |
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96 | /** |
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97 | * @brief Enables CAN device. |
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98 | * |
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99 | * @param obj The device to be enabled. |
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100 | */ |
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101 | static inline void can_enable( const can_driver_entry *const obj ) |
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102 | { |
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103 | if ( obj->device->MOD & CAN_MOD_RM ) { |
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104 | obj->device->MOD &= ~( CAN_MOD_RM ); |
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105 | } |
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106 | } |
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107 | |
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108 | /** |
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109 | * @brief Disables CAN device to set parameters, and returns the previous value |
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110 | * of the MOD register. |
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111 | * |
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112 | * @param obj The device to disable. |
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113 | * @return The previous status of MOD register. |
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114 | */ |
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115 | static inline uint32_t can_disable( const can_driver_entry *const obj ) |
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116 | { |
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117 | const uint32_t sm = obj->device->MOD; |
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118 | |
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119 | obj->device->MOD |= CAN_MOD_RM; |
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120 | |
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121 | return sm; |
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122 | } |
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123 | |
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124 | /** |
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125 | * @brief Resets the error count. |
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126 | * |
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127 | * @param obj which device reset. |
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128 | */ |
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129 | static inline void can_reset( const can_driver_entry *const obj ) |
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130 | { |
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131 | can_disable( obj ); |
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132 | obj->device->GSR = 0; /* Reset error counter when CANxMOD is in reset*/ |
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133 | } |
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134 | |
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135 | /** |
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136 | * @brief This table has the sampling points as close to 75% as possible. |
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137 | * The first value is TSEG1, the second is TSEG2. |
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138 | */ |
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139 | static const unsigned int timing_pts[ MAX_TSEG1_TSEG2_BITS + |
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140 | 1 ][ CAN_NUMBER_OF_TSEG ] = { |
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141 | { 0x0, 0x0 }, /* 2, 50%*/ |
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142 | { 0x1, 0x0 }, /* 3, 67%*/ |
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143 | { 0x2, 0x0 }, /* 4, 75%*/ |
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144 | { 0x3, 0x0 }, /* 5, 80%*/ |
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145 | { 0x3, 0x1 }, /* 6, 67%*/ |
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146 | { 0x4, 0x1 }, /* 7, 71%*/ |
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147 | { 0x5, 0x1 }, /* 8, 75%*/ |
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148 | { 0x6, 0x1 }, /* 9, 78%*/ |
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149 | { 0x6, 0x2 }, /* 10, 70%*/ |
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150 | { 0x7, 0x2 }, /* 11, 73%*/ |
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151 | { 0x8, 0x2 }, /* 12, 75%*/ |
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152 | { 0x9, 0x2 }, /* 13, 77%*/ |
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153 | { 0x9, 0x3 }, /* 14, 71%*/ |
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154 | { 0xA, 0x3 }, /* 15, 73%*/ |
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155 | { 0xB, 0x3 }, /* 16, 75%*/ |
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156 | { 0xC, 0x3 }, /* 17, 76%*/ |
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157 | { 0xD, 0x3 }, /* 18, 78%*/ |
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158 | { 0xD, 0x4 }, /* 19, 74%*/ |
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159 | { 0xE, 0x4 }, /* 20, 75%*/ |
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160 | { 0xF, 0x4 }, /* 21, 76%*/ |
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161 | { 0xF, 0x5 }, /* 22, 73%*/ |
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162 | { 0xF, 0x6 }, /* 23, 70%*/ |
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163 | { 0xF, 0x7 }, /* 24, 67%*/ |
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164 | }; |
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165 | |
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166 | /** |
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167 | * @brief Checks if divisor is a divisor of value. |
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168 | * |
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169 | * @param value The number to be divided. |
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170 | * @param divisor The divisor to check. |
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171 | * |
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172 | * @return true if "number" is divided by "divisor"; false otherwise. |
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173 | */ |
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174 | static inline bool is_divisor( |
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175 | const uint32_t value, |
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176 | const uint16_t divisor |
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177 | ) |
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178 | { |
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179 | return ( ( value % divisor ) == 0 ); |
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180 | } |
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181 | |
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182 | /** |
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183 | * @brief Gets the size of the two tseg values added according to the given |
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184 | * bitwidth and brp (The CAN prescaler). |
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185 | * |
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186 | * @param bitwidth The total bitwidth of a CAN bit (in pclk clocks). |
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187 | * @param brp The CAN clock prescaler. |
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188 | * |
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189 | * @return The value of tseg1 + tseg2 of the CAN bit. It is useful |
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190 | * to serve for index for timing_pts array). |
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191 | */ |
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192 | static inline uint32_t get_tseg_bit_size( |
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193 | const uint32_t bitwidth, |
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194 | const uint16_t brp |
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195 | ) |
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196 | { |
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197 | return ( ( bitwidth / ( brp + CAN_BRP_EXTRA_BIT ) ) - CAN_TSEG_EXTRA_BITS ); |
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198 | } |
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199 | |
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200 | /** |
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201 | * @brief Gets the brp and tsegbitsize in order to achieve the desired bitwidth. |
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202 | * @details The following must be fullfilled: |
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203 | *(brp + CAN_BRP_EXTRA_BIT) * (tsegbitsize + CAN_TSEG_EXTRA_BITS) == bitwidth |
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204 | * |
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205 | * @param bitwidth The bitwidth that we need to achieve. |
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206 | * @param brp Here it returns the calculated brp value. |
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207 | * @param tsegbitsize Here it returns the calculated tseg bit size value. |
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208 | * @return true if brp and tsegbitsize have been calculated. |
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209 | */ |
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210 | static inline bool get_brp_and_bitsize( |
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211 | const uint32_t bitwidth, |
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212 | uint16_t *const brp, |
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213 | uint32_t *const tsegbitsize |
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214 | ) |
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215 | { |
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216 | bool hit = false; |
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217 | |
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218 | while ( ( !hit ) && ( *brp < bitwidth / MIN_NUMBER_OF_CAN_BITS ) ) { |
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219 | if ( ( is_divisor( bitwidth, *brp + CAN_BRP_EXTRA_BIT ) ) |
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220 | && ( get_tseg_bit_size( bitwidth, *brp ) < MAX_TSEG1_TSEG2_BITS ) ) { |
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221 | hit = true; |
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222 | *tsegbitsize = get_tseg_bit_size( bitwidth, *brp ); |
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223 | } else { /*Correct values not found, keep looking*/ |
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224 | ( *brp )++; |
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225 | } |
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226 | } |
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227 | |
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228 | return hit; |
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229 | } |
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230 | |
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231 | /** |
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232 | * @brief Constructs the btr register with the passed arguments. |
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233 | * |
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234 | * @param tsegbitsize The size tseg bits to set. |
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235 | * @param psjw The sjw to set. |
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236 | * @param brp The prescaler value to set. |
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237 | * @return The constructed btr register. |
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238 | */ |
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239 | static inline uint32_t get_btr( |
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240 | const uint32_t tsegbitsize, |
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241 | const unsigned char psjw, |
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242 | const uint32_t brp |
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243 | ) |
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244 | { |
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245 | const uint32_t tseg2_value_masked = |
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246 | ( ( timing_pts[ tsegbitsize ][ CAN_TSEG2 ] << CAN_BTR_TSEG2_SHIFT ) & |
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247 | CAN_BTR_TSEG2_MASK ); |
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248 | const uint32_t tseg1_value_masked = |
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249 | ( ( timing_pts[ tsegbitsize ][ CAN_TSEG1 ] << |
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250 | CAN_BTR_TSEG1_SHIFT ) & CAN_BTR_TSEG1_MASK ); |
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251 | const uint32_t psjw_value_masked = |
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252 | ( ( psjw << CAN_BTR_SJW_SHIFT ) & CAN_BTR_SJW_MASK ); |
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253 | const uint32_t brp_value_masked = |
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254 | ( ( brp << CAN_BTR_BRP_SHIFT ) & CAN_BTR_BRP_MASK ); |
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255 | |
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256 | return tseg1_value_masked | tseg2_value_masked | |
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257 | psjw_value_masked | brp_value_masked; |
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258 | } |
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259 | |
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260 | /** |
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261 | * @brief Calculates and returns a bit timing register (btr) for the desired |
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262 | * canclk frequency using the passed psjw, system clock and peripheral clock. |
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263 | * |
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264 | * @param systemclk The clock of the system (in Hz). |
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265 | * @param pclkdiv The peripheral clock divisor for the can device. |
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266 | * @param canclk The desired frequency for CAN (in Hz). |
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267 | * @param psjw The desired psjw. |
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268 | * @return The btr register value if found, WRONG_BTR_VALUE otherwise. |
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269 | */ |
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270 | static inline unsigned int can_speed( |
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271 | const unsigned int systemclk, |
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272 | const unsigned int pclkdiv, |
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273 | const unsigned int canclk, |
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274 | const unsigned char psjw |
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275 | ) |
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276 | { |
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277 | uint32_t btr = WRONG_BTR_VALUE; |
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278 | const uint32_t bitwidth = systemclk / ( pclkdiv * canclk ); |
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279 | |
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280 | /* This is for the brp (prescaler) to start searching a reachable multiple.*/ |
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281 | uint16_t brp = bitwidth / MAX_NUMBER_OF_CAN_BITS; |
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282 | uint32_t tsegbitsize; |
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283 | |
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284 | if ( get_brp_and_bitsize( bitwidth, &brp, &tsegbitsize ) ) { |
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285 | btr = get_btr( tsegbitsize, psjw, brp ); |
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286 | } |
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287 | |
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288 | return btr; |
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289 | } |
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290 | |
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291 | /** |
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292 | * @brief Configures the desired CAN device with the desired frequency. |
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293 | * |
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294 | * @param obj The can device to configure. |
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295 | * @param f The desired frequency. |
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296 | * |
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297 | * @return RTEMS_SUCCESSFUL if could be set, RTEMS_INVALID_NUMBER otherwise. |
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298 | */ |
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299 | static rtems_status_code can_frequency( |
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300 | const can_driver_entry *const obj, |
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301 | const can_freq freq |
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302 | ) |
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303 | { |
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304 | rtems_status_code sc = RTEMS_INVALID_NUMBER; |
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305 | const uint32_t btr = can_speed( LPC176X_CCLK, LPC176X_PCLKDIV, freq, 1 ); |
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306 | |
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307 | if ( btr != WRONG_BTR_VALUE ) { |
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308 | sc = RTEMS_SUCCESSFUL; |
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309 | uint32_t modmask = can_disable( obj ); |
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310 | obj->device->BTR = btr; |
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311 | obj->device->MOD = modmask; |
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312 | } /*else couldnt found a good timing for the desired frequency, |
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313 | return RTEMS_INVALID_NUMBER.*/ |
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314 | |
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315 | return sc; |
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316 | } |
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317 | |
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318 | /** |
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319 | * @brief Installs the interrupt handler in rtems. |
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320 | */ |
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321 | static inline rtems_status_code can_initialize( void ) |
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322 | { |
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323 | return rtems_interrupt_handler_install( |
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324 | LPC176X_IRQ_CAN, |
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325 | "can_interrupt", |
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326 | RTEMS_INTERRUPT_UNIQUE, |
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327 | can_isr, |
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328 | NULL |
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329 | ); |
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330 | } |
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331 | |
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332 | rtems_status_code can_open( const lpc176x_can_number minor, can_freq freq ) |
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333 | { |
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334 | const can_driver_entry *const can_driver = &can_driver_table[ minor ]; |
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335 | rtems_status_code sc = RTEMS_INVALID_NUMBER; |
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336 | |
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337 | if ( CAN_DRIVER_IS_MINOR_VALID( minor ) ) { |
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338 | /*Enable CAN and acceptance filter modules.*/ |
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339 | sc = |
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340 | lpc176x_module_enable( can_driver->module, LPC176X_MODULE_PCLK_DEFAULT ); |
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341 | RTEMS_CHECK_SC( sc, "enable can module" ); |
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342 | sc = lpc176x_module_enable( LPC176X_MODULE_ACCF, |
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343 | LPC176X_MODULE_PCLK_DEFAULT ); |
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344 | RTEMS_CHECK_SC( sc, "enable acceptance filter" ); |
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345 | /*Set pin functions.*/ |
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346 | setpins( minor ); |
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347 | |
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348 | can_reset( can_driver ); |
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349 | can_driver->device->IER = CAN_DEFAULT_INTERRUPT_CONFIGURATION; |
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350 | sc = can_frequency( can_driver, freq ); |
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351 | RTEMS_CHECK_SC( sc, "Configure CAN frequency" ); |
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352 | can_initialize(); |
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353 | |
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354 | acceptance_filter_device->AFMR = CAN_ACCF_AFMR_ACCBP; /*Bypass Filter.*/ |
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355 | } |
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356 | |
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357 | return sc; |
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358 | } |
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359 | |
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360 | /** |
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361 | * @brief Calls the installed isrs, according to the active interrupts. |
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362 | * |
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363 | * @param vector The read vector of active interrupts. |
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364 | * @param number The CAN device to look for interruptions. |
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365 | */ |
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366 | static inline void call_isrs( |
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367 | const uint32_t vector, |
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368 | const lpc176x_can_number number |
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369 | ) |
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370 | { |
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371 | can_irq_type i; |
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372 | |
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373 | for ( i = IRQ_RX; i < CAN_IRQ_NUMBER; ++i ) { |
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374 | if ( ( isr_vector[ i ] != NULL ) && ( vector & ( 1 << i ) ) ) |
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375 | isr_vector[ i ]( number ); |
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376 | |
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377 | /* else this interrupt has not been raised or it hasn't got a handler, |
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378 | so do nothing.*/ |
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379 | } |
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380 | } |
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381 | |
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382 | /** |
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383 | * @brief Checks if the passed CAN device is enabled and if it is checks for |
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384 | * active interrupts and calls its installed isr. |
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385 | * |
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386 | * @param number The CAN device to check for interrupts rised. |
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387 | */ |
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388 | static inline void search_and_call_int( const lpc176x_can_number number ) |
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389 | { |
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390 | const can_driver_entry *const driver = &can_driver_table[ number ]; |
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391 | |
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392 | if ( LPC176X_SCB.pconp & driver->pconp_pin ) { |
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393 | /*We must read the whole register at once because it resets when read.*/ |
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394 | const uint32_t int_vector = driver->device->ICR & CAN_INTERRUPT_TYPE_MASK; |
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395 | call_isrs( int_vector, number ); |
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396 | } |
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397 | |
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398 | /*else the device is shut down so we must do nothing.*/ |
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399 | } |
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400 | |
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401 | /** |
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402 | * @brief The standard isr to be installed for all the CAN devices. |
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403 | * |
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404 | * @param arg unused. |
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405 | */ |
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406 | static void can_isr( void *arg ) |
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407 | { |
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408 | lpc176x_can_number i; |
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409 | |
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410 | for ( i = CAN_0; i < CAN_DEVICES_NUMBER; ++i ) { |
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411 | search_and_call_int( i ); |
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412 | } |
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413 | } |
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414 | |
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415 | rtems_status_code can_read( |
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416 | const lpc176x_can_number minor, |
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417 | can_message *message |
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418 | ) |
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419 | { |
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420 | rtems_status_code sc = RTEMS_IO_ERROR; |
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421 | const can_driver_entry *const can_driver = &can_driver_table[ minor ]; |
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422 | can_device *const dev = can_driver->device; |
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423 | registers_can_message *const msg = &( message->registers ); |
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424 | |
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425 | can_enable( can_driver ); |
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426 | |
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427 | if ( dev->GSR & CAN_GSR_RBS_MASK ) { |
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428 | sc = RTEMS_SUCCESSFUL; |
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429 | *msg = dev->receive; |
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430 | dev->CMR = CAN_CMR_RRB_MASK; /* release receive buffer. */ |
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431 | } /* else Message not received.*/ |
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432 | |
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433 | return sc; |
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434 | } |
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435 | |
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436 | /** |
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437 | * @brief Array of masks and control bits for the transmit buffers. |
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438 | * It's used for each transmit buffer in order to see if it's available and to |
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439 | * send data to them. |
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440 | */ |
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441 | static const can_transmit_info transmit_info[ CAN_NUMBER_OF_TRANSMIT_BUFFERS ] |
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442 | = |
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443 | { |
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444 | { |
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445 | .can_status_mask = 0x00000004U, |
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446 | .not_cc_cmr_value = 0x21U |
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447 | }, |
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448 | { |
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449 | .can_status_mask = 0x00000400U, |
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450 | .not_cc_cmr_value = 0x41U |
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451 | }, |
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452 | { |
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453 | .can_status_mask = 0x00040000U, |
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454 | .not_cc_cmr_value = 0x81U |
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455 | } |
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456 | }; |
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457 | |
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458 | rtems_status_code can_write( |
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459 | const lpc176x_can_number minor, |
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460 | const can_message *const message |
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461 | ) |
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462 | { |
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463 | const can_driver_entry *const can_driver = &can_driver_table[ minor ]; |
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464 | can_device *const obj = can_driver->device; |
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465 | const uint32_t CANStatus = obj->SR; |
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466 | |
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467 | const registers_can_message *const msg = &( message->registers ); |
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468 | rtems_status_code sc = RTEMS_IO_ERROR; |
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469 | can_transmit_number transmit_buffer; |
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470 | |
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471 | can_enable( can_driver ); |
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472 | |
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473 | for ( transmit_buffer = CAN_TRANSMIT1; |
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474 | ( sc != RTEMS_SUCCESSFUL ) && ( transmit_buffer < |
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475 | CAN_NUMBER_OF_TRANSMIT_BUFFERS ); |
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476 | ++transmit_buffer ) { |
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477 | if ( CANStatus & transmit_info[ transmit_buffer ].can_status_mask ) { |
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478 | sc = RTEMS_SUCCESSFUL; |
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479 | obj->transmit[ transmit_buffer ] = *msg; |
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480 | obj->CMR = transmit_info[ transmit_buffer ].not_cc_cmr_value; |
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481 | } /*else can buffer busy, try with the next.*/ |
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482 | } |
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483 | |
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484 | return sc; |
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485 | } |
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486 | |
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487 | /** |
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488 | * @brief Enables the interrupt type passed to the desired CAN device. |
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489 | * |
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490 | * @param number The CAN device to enable the interrupts. |
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491 | * @param type The type of interrupt to enable. |
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492 | */ |
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493 | static inline void can_enable_interrupt( |
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494 | const lpc176x_can_number number, |
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495 | const can_irq_type type |
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496 | ) |
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497 | { |
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498 | const can_driver_entry *const driver = &can_driver_table[ number ]; |
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499 | const uint32_t ier = 1 << type; |
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500 | |
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501 | can_disable( driver ); |
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502 | driver->device->IER |= ier; |
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503 | can_enable( driver ); |
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504 | } |
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505 | |
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506 | rtems_status_code can_register_isr( |
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507 | const lpc176x_can_number number, |
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508 | const can_irq_type type, |
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509 | const lpc176x_can_isr isr |
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510 | ) |
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511 | { |
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512 | rtems_status_code sc = RTEMS_INVALID_NUMBER; |
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513 | |
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514 | if ( ( 0 <= type ) && ( type < CAN_IRQ_NUMBER ) ) { |
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515 | sc = RTEMS_SUCCESSFUL; |
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516 | isr_vector[ type ] = isr; |
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517 | can_enable_interrupt( number, type ); |
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518 | } |
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519 | |
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520 | return sc; |
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521 | } |
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522 | |
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523 | rtems_status_code create_can_message( |
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524 | can_message *const msg, |
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525 | const int _id, |
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526 | const char *const _data, |
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527 | const char _len |
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528 | ) |
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529 | { |
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530 | rtems_status_code sc = RTEMS_INVALID_NUMBER; |
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531 | |
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532 | if ( ( _len <= CAN_MAXIMUM_DATA_SIZE ) && ( _id <= CAN10_MAXIMUM_ID ) ) { |
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533 | sc = RTEMS_SUCCESSFUL; |
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534 | msg->low_level.dlc = _len; |
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535 | msg->low_level.type = CANStandard; |
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536 | msg->low_level.rtr = CANData; |
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537 | msg->low_level.id = _id; |
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538 | memcpy( msg->low_level.data, _data, _len ); |
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539 | } |
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540 | |
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541 | return sc; |
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542 | } |
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543 | |
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