source: rtems/bsps/arm/lm3s69xx/include/bsp/io.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on 12/23/17 at 07:18:56

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.
  • Property mode set to 100644
File size: 5.1 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup lm3s69xx_io
5 *
6 * @brief IO definitions.
7 */
8
9/*
10 * Copyright © 2013 Eugeniy Meshcheryakov <eugen@debian.org>
11 *
12 * The license and distribution terms for this file may be
13 * found in the file LICENSE in this distribution or at
14 * http://www.rtems.org/license/LICENSE.
15 */
16
17#ifndef LIBBSP_ARM_LM3S69XX_IO_H
18#define LIBBSP_ARM_LM3S69XX_IO_H
19#include <bspopts.h>
20#include <stdbool.h>
21
22/**
23 * @defgroup lm3s69xx_io IO Support
24 *
25 * @ingroup arm_lm3s69xx
26 *
27 * @brief IO support.
28 */
29
30typedef enum {
31  LM3S69XX_GPIO_DIRECTION_INPUT,
32  LM3S69XX_GPIO_DIRECTION_OUTPUT
33} lm3s69xx_gpio_direction;
34
35typedef enum {
36  LM3S69XX_GPIO_OTYPE_PUSH_PULL,
37  LM3S69XX_GPIO_OTYPE_OPEN_DRAIN
38} lm3s69xx_gpio_otype;
39
40typedef enum {
41  LM3S69XX_GPIO_DRIVE_2MA,
42  LM3S69XX_GPIO_DRIVE_4MA,
43  LM3S69XX_GPIO_DRIVE_8MA
44} lm3s69xx_gpio_drive;
45
46typedef enum {
47  LM3S69XX_GPIO_NO_PULL,
48  LM3S69XX_GPIO_PULL_UP,
49  LM3S69XX_GPIO_PULL_DOWN
50} lm3s69xx_gpio_pull;
51
52typedef enum {
53  LM3S69XX_GPIO_DIGITAL_DISABLE,
54  LM3S69XX_GPIO_DIGITAL_ENABLE,
55} lm3s69xx_gpio_digital;
56
57typedef enum {
58  LM3S69XX_GPIO_AF_DISABLE,
59  LM3S69XX_GPIO_AF_ENABLE
60} lm3s69xx_gpio_af;
61
62typedef enum {
63  LM3S69XX_GPIO_ANALOG_DISABLE,
64  LM3S69XX_GPIO_ANALOG_ENABLE
65} lm3s69xx_gpio_analog;
66
67typedef enum {
68  LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL,
69  LM3S69XX_GPIO_SLEW_RATE_CONTROL
70} lm3s69xx_gpio_slew_rate_control;
71
72typedef struct {
73  unsigned int pin_first : 8;
74  unsigned int pin_last : 8;
75  unsigned int digital : 1;
76  unsigned int alternate : 1;
77  unsigned int analog : 1;
78  unsigned int dir : 1;
79  unsigned int otype : 1;
80  unsigned int drive : 2;
81  unsigned int pull : 2;
82  unsigned int slr : 1;
83} lm3s69xx_gpio_config;
84
85typedef enum {
86  LM3S69XX_PORT_A,
87  LM3S69XX_PORT_B,
88  LM3S69XX_PORT_C,
89  LM3S69XX_PORT_D,
90  LM3S69XX_PORT_E,
91  LM3S69XX_PORT_F,
92  LM3S69XX_PORT_G,
93#if LM3S69XX_NUM_GPIO_BLOCKS > 7
94  LM3S69XX_PORT_H
95#endif
96} lm3s69xx_gpio_port;
97
98#define LM3S69XX_GPIO_PIN(port, idx) (((port) << 3) | (idx))
99#define LM3S69XX_GPIO_PORT_OF_PIN(pin) (((pin) >> 3) & 0xf)
100#define LM3S69XX_GPIO_INDEX_OF_PIN(pin) ((pin) & 0x7)
101
102#define LM3S69XX_PIN_UART_TX(port, idx) \
103  { \
104    .pin_first = LM3S69XX_GPIO_PIN(port, idx), \
105    .pin_last = LM3S69XX_GPIO_PIN(port, idx), \
106    .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \
107    .alternate = LM3S69XX_GPIO_AF_ENABLE, \
108    .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \
109    .dir = LM3S69XX_GPIO_DIRECTION_OUTPUT, \
110    .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \
111    .drive = LM3S69XX_GPIO_DRIVE_2MA, \
112    .pull = LM3S69XX_GPIO_NO_PULL, \
113    .slr = LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL \
114  }
115
116#define LM3S69XX_PIN_UART_RX(port, idx) \
117  { \
118    .pin_first = LM3S69XX_GPIO_PIN(port, idx), \
119    .pin_last = LM3S69XX_GPIO_PIN(port, idx), \
120    .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \
121    .alternate = LM3S69XX_GPIO_AF_ENABLE, \
122    .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \
123    .dir = LM3S69XX_GPIO_DIRECTION_INPUT, \
124    .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \
125    .drive = LM3S69XX_GPIO_DRIVE_2MA, \
126    .pull = LM3S69XX_GPIO_PULL_UP, \
127    .slr = LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL \
128  }
129
130#define LM3S69XX_PIN_UART_RTS(port, idx) \
131  { \
132    .pin_first = LM3S69XX_GPIO_PIN(port, idx), \
133    .pin_last = LM3S69XX_GPIO_PIN(port, idx), \
134    .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \
135    .alternate = LM3S69XX_GPIO_AF_ENABLE, \
136    .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \
137    .dir = LM3S69XX_GPIO_DIRECTION_OUTPUT, \
138    .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \
139    .drive = LM3S69XX_GPIO_DRIVE_2MA, \
140    .pull = LM3S69XX_GPIO_NO_PULL, \
141    .slr = LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL \
142  }
143
144#define LM3S69XX_PIN_UART_CTS(port, idx) \
145  { \
146    .pin_first = LM3S69XX_GPIO_PIN(port, idx), \
147    .pin_last = LM3S69XX_GPIO_PIN(port, idx), \
148    .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \
149    .alternate = LM3S69XX_GPIO_AF_ENABLE, \
150    .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \
151    .dir = LM3S69XX_GPIO_DIRECTION_INPUT, \
152    .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \
153    .drive = LM3S69XX_GPIO_DRIVE_2MA, \
154    .pull = LM3S69XX_GPIO_PULL_UP, \
155    .slr = LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL \
156  }
157
158#define LM3S69XX_PIN_LED(port, idx) \
159  { \
160    .pin_first = LM3S69XX_GPIO_PIN(port, idx), \
161    .pin_last = LM3S69XX_GPIO_PIN(port, idx), \
162    .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \
163    .alternate = LM3S69XX_GPIO_AF_DISABLE, \
164    .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \
165    .dir = LM3S69XX_GPIO_DIRECTION_OUTPUT, \
166    .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \
167    .drive = LM3S69XX_GPIO_DRIVE_8MA, \
168    .pull = LM3S69XX_GPIO_NO_PULL, \
169    .slr = LM3S69XX_GPIO_SLEW_RATE_CONTROL \
170  }
171
172#define LM3S69XX_PIN_SSI_TX(port, idx) LM3S69XX_PIN_UART_TX(port, idx)
173#define LM3S69XX_PIN_SSI_RX(port, idx) LM3S69XX_PIN_UART_RX(port, idx)
174
175#ifdef __cplusplus
176extern "C" {
177#endif
178
179void lm3s69xx_gpio_set_config(const lm3s69xx_gpio_config *config);
180void lm3s69xx_gpio_set_config_array(const lm3s69xx_gpio_config *configs, unsigned int count);
181void lm3s69xx_gpio_digital_enable(unsigned int pin, bool enable);
182void lm3s69xx_gpio_analog_mode_select(unsigned int pin, bool enable);
183
184void lm3s69xx_gpio_set_pin(unsigned int pin, bool set);
185bool lm3s69xx_gpio_get_pin(unsigned int pin);
186
187#ifdef __cplusplus
188}
189#endif
190
191#endif /* LIBBSP_ARM_LM3S69XX_IO_H */
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