[e1ebfebf] | 1 | From 78e85bb79c02b14170c3f39d9bb9cccd4d625890 Mon Sep 17 00:00:00 2001 |
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| 2 | From: Sebastian Huber <sebastian.huber@embedded-brains.de> |
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| 3 | Date: Fri, 16 Dec 2011 20:12:29 +0100 |
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| 4 | Subject: [PATCH 3/4] target-arm: Evil hack for BASEPRI and BASEPRI_MAX |
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| 5 | |
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| 6 | This is only a quick and dirty fix to get the ARMv7-M BASEPRI and |
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| 7 | BASEPRI_MAX feature working. |
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| 8 | |
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| 9 | Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> |
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| 10 | --- |
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| 11 | cpu-exec.c | 4 ++-- |
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| 12 | target-arm/helper.c | 12 +++++------- |
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| 13 | 2 files changed, 7 insertions(+), 9 deletions(-) |
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| 14 | |
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| 15 | diff --git a/cpu-exec.c b/cpu-exec.c |
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| 16 | index a9fa608..6ca9aab 100644 |
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| 17 | --- a/cpu-exec.c |
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| 18 | +++ b/cpu-exec.c |
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| 19 | @@ -408,8 +408,8 @@ int cpu_exec(CPUState *env) |
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| 20 | We avoid this by disabling interrupts when |
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| 21 | pc contains a magic address. */ |
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| 22 | if (interrupt_request & CPU_INTERRUPT_HARD |
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| 23 | - && ((IS_M(env) && env->regs[15] < 0xfffffff0) |
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| 24 | - || !(env->uncached_cpsr & CPSR_I))) { |
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| 25 | + && !(env->uncached_cpsr & CPSR_I) |
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| 26 | + && (!IS_M(env) || env->regs[15] < 0xfffffff0)) { |
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| 27 | env->exception_index = EXCP_IRQ; |
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| 28 | do_interrupt(env); |
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| 29 | next_tb = 0; |
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| 30 | diff --git a/target-arm/helper.c b/target-arm/helper.c |
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| 31 | index 65f4fbf..be2e6db 100644 |
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| 32 | --- a/target-arm/helper.c |
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| 33 | +++ b/target-arm/helper.c |
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| 34 | @@ -2163,7 +2163,7 @@ uint32_t HELPER(v7m_mrs)(CPUState *env, uint32_t reg) |
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| 35 | return (env->uncached_cpsr & CPSR_I) != 0; |
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| 36 | case 17: /* BASEPRI */ |
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| 37 | case 18: /* BASEPRI_MAX */ |
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| 38 | - return env->v7m.basepri; |
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| 39 | + return (env->uncached_cpsr & CPSR_I) != 0; |
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| 40 | case 19: /* FAULTMASK */ |
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| 41 | return (env->uncached_cpsr & CPSR_F) != 0; |
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| 42 | case 20: /* CONTROL */ |
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| 43 | @@ -2218,13 +2218,11 @@ void HELPER(v7m_msr)(CPUState *env, uint32_t reg, uint32_t val) |
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| 44 | env->uncached_cpsr &= ~CPSR_I; |
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| 45 | break; |
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| 46 | case 17: /* BASEPRI */ |
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| 47 | - env->v7m.basepri = val & 0xff; |
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| 48 | - break; |
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| 49 | case 18: /* BASEPRI_MAX */ |
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| 50 | - val &= 0xff; |
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| 51 | - if (val != 0 && (val < env->v7m.basepri || env->v7m.basepri == 0)) |
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| 52 | - env->v7m.basepri = val; |
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| 53 | - break; |
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| 54 | + if (val) |
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| 55 | + env->uncached_cpsr |= CPSR_I; |
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| 56 | + else |
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| 57 | + env->uncached_cpsr &= ~CPSR_I; |
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| 58 | case 19: /* FAULTMASK */ |
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| 59 | if (val & 1) |
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| 60 | env->uncached_cpsr |= CPSR_F; |
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| 61 | -- |
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| 62 | 1.7.1 |
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| 63 | |
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