source: rtems/bsps/arm/include/bsp/lpc-emc.h @ ba619b7f

Last change on this file since ba619b7f was ba619b7f, checked in by Joel Sherrill <joel@…>, on 03/01/22 at 21:38:20

bsps/arm/: Scripted embedded brains header file clean up

Updates #4625.
  • Property mode set to 100644
File size: 3.4 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup lpc_emc
5 *
6 * @brief EMC support API.
7 */
8
9/*
10 * Copyright (c) 2010-2011 embedded brains GmbH.  All rights reserved.
11 *
12 * The license and distribution terms for this file may be
13 * found in the file LICENSE in this distribution or at
14 * http://www.rtems.org/license/LICENSE.
15 */
16
17#ifndef LIBBSP_ARM_SHARED_LPC_EMC_H
18#define LIBBSP_ARM_SHARED_LPC_EMC_H
19
20#include <bsp/utility.h>
21
22#ifdef __cplusplus
23extern "C" {
24#endif /* __cplusplus */
25
26/**
27 * @defgroup lpc_emc EMC Support
28 *
29 * @ingroup RTEMSBSPsARMLPC24XX
30 * @ingroup RTEMSBSPsARMLPC32XX
31 *
32 * @brief EMC Support
33 *
34 * @{
35 */
36
37/**
38 * @name EMC Control Register (EMCControl)
39 *
40 * @{
41 */
42
43#define EMC_CTRL_E BSP_BIT32(0)
44#define EMC_CTRL_M BSP_BIT32(0)
45#define EMC_CTRL_L BSP_BIT32(2)
46
47/** @} */
48
49/**
50 * @name EMC Dynamic Memory Control Register (EMCDynamicControl)
51 *
52 * @{
53 */
54
55#define EMC_DYN_CTRL_CE BSP_BIT32(0)
56#define EMC_DYN_CTRL_CS BSP_BIT32(1)
57#define EMC_DYN_CTRL_SR BSP_BIT32(2)
58#define EMC_DYN_CTRL_SRMCC BSP_BIT32(3)
59#define EMC_DYN_CTRL_IMCC BSP_BIT32(4)
60#define EMC_DYN_CTRL_MCC BSP_BIT32(5)
61#define EMC_DYN_CTRL_I_MASK BSP_MSK32(7, 8)
62#define EMC_DYN_CTRL_I_NORMAL BSP_FLD32(0x0, 7, 8)
63#define EMC_DYN_CTRL_I_MODE BSP_FLD32(0x1, 7, 8)
64#define EMC_DYN_CTRL_I_PALL BSP_FLD32(0x2, 7, 8)
65#define EMC_DYN_CTRL_I_NOP BSP_FLD32(0x3, 7, 8)
66#define EMC_DYN_CTRL_DP BSP_BIT32(13)
67
68/** @} */
69
70/**
71 * @name EMC Dynamic Memory Read Configuration Register (EMCDynamicReadConfig)
72 *
73 * @{
74 */
75
76#define EMC_DYN_READ_CONFIG_SDR_STRAT(val) BSP_FLD32(val, 0, 1)
77#define EMC_DYN_READ_CONFIG_SDR_POL_POS BSP_BIT32(4)
78#define EMC_DYN_READ_CONFIG_DDR_STRAT(val) BSP_FLD32(val, 8, 9)
79#define EMC_DYN_READ_CONFIG_DDR_POL_POS BSP_BIT32(12)
80
81/** @} */
82
83/**
84 * @name EMC Dynamic Memory Configuration N Register (EMCDynamicConfigN)
85 *
86 * @{
87 */
88
89#define EMC_DYN_CFG_MD_LPC24XX(val) BSP_FLD32(val, 3, 4)
90#define EMC_DYN_CFG_MD_LPC32XX(val) BSP_FLD32(val, 0, 2)
91#define EMC_DYN_CFG_AM(val) BSP_FLD32(val, 7, 14)
92#define EMC_DYN_CFG_B BSP_BIT32(19)
93#define EMC_DYN_CFG_P BSP_BIT32(20)
94
95/** @} */
96
97/**
98 * @name EMC Dynamic Memory RAS and CAS Delay N Register (EMCDynamicRasCasN)
99 *
100 * @{
101 */
102
103#define EMC_DYN_RASCAS_RAS(val) BSP_FLD32(val, 0, 3)
104#define EMC_DYN_RASCAS_CAS(val, half) BSP_FLD32(((val) << 1) | (half), 7, 10)
105
106/** @} */
107
108#define EMC_DYN_CHIP_COUNT 4
109
110#define EMC_STATIC_CHIP_COUNT 4
111
112typedef struct {
113  uint32_t config;
114  uint32_t rascas;
115  uint32_t reserved_0 [6];
116} lpc_emc_dynamic;
117
118typedef struct {
119  uint32_t config;
120  uint32_t waitwen;
121  uint32_t waitoen;
122  uint32_t waitrd;
123  uint32_t waitpage;
124  uint32_t waitwr;
125  uint32_t waitturn;
126  uint32_t reserved_0 [1];
127} lpc_emc_static;
128
129typedef struct {
130  uint32_t control;
131  uint32_t status;
132  uint32_t config;
133  uint32_t reserved_0 [5];
134  uint32_t dynamiccontrol;
135  uint32_t dynamicrefresh;
136  uint32_t dynamicreadconfig;
137  uint32_t reserved_1;
138  uint32_t dynamictrp;
139  uint32_t dynamictras;
140  uint32_t dynamictsrex;
141  uint32_t dynamictapr;
142  uint32_t dynamictdal;
143  uint32_t dynamictwr;
144  uint32_t dynamictrc;
145  uint32_t dynamictrfc;
146  uint32_t dynamictxsr;
147  uint32_t dynamictrrd;
148  uint32_t dynamictmrd;
149  uint32_t dynamictcdlr;
150  uint32_t reserved_3 [8];
151  uint32_t staticextendedwait;
152  uint32_t reserved_4 [31];
153  lpc_emc_dynamic dynamic [EMC_DYN_CHIP_COUNT];
154  uint32_t reserved_5 [32];
155  lpc_emc_static emcstatic [EMC_STATIC_CHIP_COUNT];
156} lpc_emc;
157
158/** @} */
159
160#ifdef __cplusplus
161}
162#endif /* __cplusplus */
163
164#endif /* LIBBSP_ARM_SHARED_LPC_EMC_H */
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