source: rtems/bsps/arm/include/bsp/arm-gic.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on 12/23/17 at 07:18:56

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 4.4 KB
Line 
1/**
2 *  @file
3 *
4 *  @ingroup arm_gic
5 *
6 *  @brief ARM GIC Support
7 */
8
9/*
10 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <info@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef LIBBSP_ARM_SHARED_ARM_GIC_H
24#define LIBBSP_ARM_SHARED_ARM_GIC_H
25
26#include <bsp/arm-gic-regs.h>
27
28#include <stdbool.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif /* __cplusplus */
33
34/**
35 *  @defgroup arm_gic ARM GIC
36 *
37 *  @ingroup arm_shared
38 *
39 *  @brief ARM_GIC Support Package
40 */
41
42#define GIC_ID_TO_ONE_BIT_REG_INDEX(id) ((id) >> 5)
43#define GIC_ID_TO_ONE_BIT_REG_BIT(id) (1U << ((id) & 0x1fU))
44
45#define GIC_ID_TO_TWO_BITS_REG_INDEX(id) ((id) >> 4)
46#define GIC_ID_TO_TWO_BITS_REG_OFFSET(id) (((id) & 0xfU) << 1)
47
48static inline bool gic_id_is_enabled(volatile gic_dist *dist, uint32_t id)
49{
50  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
51  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
52
53  return (dist->icdiser[i] & bit) != 0;
54}
55
56static inline void gic_id_enable(volatile gic_dist *dist, uint32_t id)
57{
58  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
59  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
60
61  dist->icdiser[i] = bit;
62}
63
64static inline void gic_id_disable(volatile gic_dist *dist, uint32_t id)
65{
66  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
67  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
68
69  dist->icdicer[i] = bit;
70}
71
72static inline bool gic_id_is_pending(volatile gic_dist *dist, uint32_t id)
73{
74  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
75  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
76
77  return (dist->icdispr[i] & bit) != 0;
78}
79
80static inline void gic_id_set_pending(volatile gic_dist *dist, uint32_t id)
81{
82  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
83  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
84
85  dist->icdispr[i] = bit;
86}
87
88static inline void gic_id_clear_pending(volatile gic_dist *dist, uint32_t id)
89{
90  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
91  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
92
93  dist->icdicpr[i] = bit;
94}
95
96static inline bool gic_id_is_active(volatile gic_dist *dist, uint32_t id)
97{
98  uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id);
99  uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id);
100
101  return (dist->icdabr[i] & bit) != 0;
102}
103
104static inline void gic_id_set_priority(
105  volatile gic_dist *dist,
106  uint32_t id,
107  uint8_t priority
108)
109{
110  dist->icdipr[id] = priority;
111}
112
113static inline uint8_t gic_id_get_priority(volatile gic_dist *dist, uint32_t id)
114{
115  return dist->icdipr[id];
116}
117
118static inline void gic_id_set_targets(
119  volatile gic_dist *dist,
120  uint32_t id,
121  uint8_t targets
122)
123{
124  dist->icdiptr[id] = targets;
125}
126
127static inline uint8_t gic_id_get_targets(volatile gic_dist *dist, uint32_t id)
128{
129  return dist->icdiptr[id];
130}
131
132typedef enum {
133  GIC_LEVEL_SENSITIVE,
134  GIC_EDGE_TRIGGERED
135} gic_trigger_mode;
136
137static inline gic_trigger_mode gic_id_get_trigger_mode(
138  volatile gic_dist *dist,
139  uint32_t id
140)
141{
142  uint32_t i = GIC_ID_TO_TWO_BITS_REG_INDEX(id);
143  uint32_t o = GIC_ID_TO_TWO_BITS_REG_OFFSET(id) + 1;
144  uint32_t bit = 1U << o;
145
146  return (dist->icdicfr[i] & bit) != 0 ?
147    GIC_EDGE_TRIGGERED : GIC_LEVEL_SENSITIVE;
148}
149
150static inline void gic_id_set_trigger_mode(
151  volatile gic_dist *dist,
152  uint32_t id,
153  gic_trigger_mode mode
154)
155{
156  uint32_t i = GIC_ID_TO_TWO_BITS_REG_INDEX(id);
157  uint32_t o = GIC_ID_TO_TWO_BITS_REG_OFFSET(id) + 1;
158  uint32_t bit = mode << o;
159  uint32_t mask = 1U << o;
160  uint32_t icdicfr = dist->icdicfr[i];
161
162  icdicfr &= ~mask;
163  icdicfr |= bit;
164
165  dist->icdicfr[i] = icdicfr;
166}
167
168typedef enum {
169  GIC_N_TO_N,
170  GIC_1_TO_N
171} gic_handling_model;
172
173static inline gic_handling_model gic_id_get_handling_model(
174  volatile gic_dist *dist,
175  uint32_t id
176)
177{
178  uint32_t i = GIC_ID_TO_TWO_BITS_REG_INDEX(id);
179  uint32_t o = GIC_ID_TO_TWO_BITS_REG_OFFSET(id);
180  uint32_t bit = 1U << o;
181
182  return (dist->icdicfr[i] & bit) != 0 ? GIC_1_TO_N : GIC_N_TO_N;
183}
184
185static inline void gic_id_set_handling_model(
186  volatile gic_dist *dist,
187  uint32_t id,
188  gic_handling_model model
189)
190{
191  uint32_t i = GIC_ID_TO_TWO_BITS_REG_INDEX(id);
192  uint32_t o = GIC_ID_TO_TWO_BITS_REG_OFFSET(id);
193  uint32_t bit = model << o;
194  uint32_t mask = 1U << o;
195  uint32_t icdicfr = dist->icdicfr[i];
196
197  icdicfr &= ~mask;
198  icdicfr |= bit;
199
200  dist->icdicfr[i] = icdicfr;
201}
202
203#ifdef __cplusplus
204}
205#endif /* __cplusplus */
206
207#endif /* LIBBSP_ARM_SHARED_ARM_GIC_H */
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