source: rtems/bsps/arm/include/bsp/arm-errata.h @ 828276b

5
Last change on this file since 828276b was 828276b, checked in by Sebastian Huber <sebastian.huber@…>, on 03/05/19 at 06:58:18

bsps: Adjust shared Doxygen groups

Update #3706.
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File size: 3.1 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup RTEMSBSPsARMShared
5 *
6 * @brief Create #defines which state which erratas shall get applied
7 */
8
9/*
10 * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef ARM_ERRATA_H_
24#define ARM_ERRATA_H_
25
26#include <bsp/arm-release-id.h>
27#include <libcpu/arm-cp15.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif /* __cplusplus */
32
33static inline arm_release_id arm_errata_get_processor_release(void)
34{
35  const uint32_t MIDR          = arm_cp15_get_id_code();
36  const uint8_t  REVISION      = (MIDR & 0xF00000U) >> 20;
37  const uint8_t  PATCH_LEVEL   = (MIDR & 0xFU);
38
39  return ARM_RELEASE_ID_FROM_NUMBER_AND_PATCH_LEVEL(
40    REVISION,
41    PATCH_LEVEL
42  );
43}
44
45static inline bool arm_errata_is_applicable_processor_errata_764369(void)
46{
47#if defined(RTEMS_SMP)
48  const arm_release_id RELEASE       = arm_errata_get_processor_release();
49  bool                 is_applicable = false;
50
51  /* Errata information for Cortex-A9 processors.
52   * Information taken from ARMs
53   * "Cortex-A series processors
54   * - Cortex-A9
55   * - Software Developers Errata Notice
56   * - Revision r4 revisions
57   * - ARM Cortex-A9 processors r4 release Software Developers Errata Notice"
58   * The corresponding link is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
59   * Please see this document for more information on these erratas */
60
61  switch( RELEASE ) {
62    case ARM_RELEASE_ID_R4_P1:
63    case ARM_RELEASE_ID_R4_P4:
64    case ARM_RELEASE_ID_R3_P0:
65    case ARM_RELEASE_ID_R2_P10:
66    case ARM_RELEASE_ID_R2_P8:
67    case ARM_RELEASE_ID_R2_P6:
68    case ARM_RELEASE_ID_R2_P4:
69    case ARM_RELEASE_ID_R2_P3:
70    case ARM_RELEASE_ID_R2_P2:
71    case ARM_RELEASE_ID_R2_P0:
72      is_applicable = true;
73      break;
74    default:
75      is_applicable = false;
76      break;
77  }
78
79  return is_applicable;
80#else
81  return false;
82#endif
83}
84
85static inline bool arm_errata_is_applicable_processor_errata_775420(void)
86{
87  const arm_release_id RELEASE       = arm_errata_get_processor_release();
88  bool                 is_applicable = false;
89
90  /* Errata information for Cortex-A9 processors.
91  * Information taken from ARMs
92  * "Cortex-A series processors
93  * - Cortex-A9
94  * - Software Developers Errata Notice
95  * - Revision r4 revisions
96  * - ARM Cortex-A9 processors r4 release Software Developers Errata Notice"
97  * The corresponding link is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
98  * Please see this document for more information on these erratas */
99
100  switch( RELEASE ) {
101    case ARM_RELEASE_ID_R2_P10:
102    case ARM_RELEASE_ID_R2_P8:
103    case ARM_RELEASE_ID_R2_P6:
104    case ARM_RELEASE_ID_R2_P4:
105    case ARM_RELEASE_ID_R2_P3:
106    case ARM_RELEASE_ID_R2_P2:
107      is_applicable = true;
108      break;
109    default:
110      is_applicable = false;
111      break;
112  }
113
114  return is_applicable;
115}
116
117#ifdef __cplusplus
118}
119#endif /* __cplusplus */
120
121#endif /* ARM_ERRATA_H_ */
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