source: rtems/bsps/arm/include/bsp/arm-cp15-start.h @ e0dd8a5a

5
Last change on this file since e0dd8a5a was 2afb22b, checked in by Chris Johns <chrisj@…>, on 12/23/17 at 07:18:56

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup arm_start
5 *
6 * @brief Arm CP15 start.
7 */
8
9
10/*
11 * Copyright (c) 2013 Hesham AL-Matary.
12 * Copyright (c) 2009-2014 embedded brains GmbH.  All rights reserved.
13 *
14 *  embedded brains GmbH
15 *  Dornierstr. 4
16 *  82178 Puchheim
17 *  Germany
18 *  <info@embedded-brains.de>
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.org/license/LICENSE.
23 */
24
25#ifndef LIBBSP_ARM_SHARED_ARM_CP15_START_H
26#define LIBBSP_ARM_SHARED_ARM_CP15_START_H
27
28#include <libcpu/arm-cp15.h>
29#include <bsp/start.h>
30#include <bsp/linker-symbols.h>
31
32#ifdef __cplusplus
33extern "C" {
34#endif /* __cplusplus */
35
36typedef struct {
37  uint32_t begin;
38  uint32_t end;
39  uint32_t flags;
40} arm_cp15_start_section_config;
41
42#define ARMV7_CP15_START_DEFAULT_SECTIONS \
43  { \
44    .begin = (uint32_t) bsp_section_fast_text_begin, \
45    .end = (uint32_t) bsp_section_fast_text_end, \
46    .flags = ARMV7_MMU_CODE_CACHED \
47  }, { \
48    .begin = (uint32_t) bsp_section_fast_data_begin, \
49    .end = (uint32_t) bsp_section_fast_data_end, \
50    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
51  }, { \
52    .begin = (uint32_t) bsp_section_start_begin, \
53    .end = (uint32_t) bsp_section_start_end, \
54    .flags = ARMV7_MMU_CODE_CACHED \
55  }, { \
56    .begin = (uint32_t) bsp_section_vector_begin, \
57    .end = (uint32_t) bsp_section_vector_end, \
58    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
59  }, { \
60    .begin = (uint32_t) bsp_section_text_begin, \
61    .end = (uint32_t) bsp_section_text_end, \
62    .flags = ARMV7_MMU_CODE_CACHED \
63  }, { \
64    .begin = (uint32_t) bsp_section_rodata_begin, \
65    .end = (uint32_t) bsp_section_rodata_end, \
66    .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED \
67  }, { \
68    .begin = (uint32_t) bsp_section_data_begin, \
69    .end = (uint32_t) bsp_section_data_end, \
70    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
71  }, { \
72    .begin = (uint32_t) bsp_section_bss_begin, \
73    .end = (uint32_t) bsp_section_bss_end, \
74    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
75  }, { \
76    .begin = (uint32_t) bsp_section_work_begin, \
77    .end = (uint32_t) bsp_section_work_end, \
78    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
79  }, { \
80    .begin = (uint32_t) bsp_section_stack_begin, \
81    .end = (uint32_t) bsp_section_stack_end, \
82    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
83  }, { \
84    .begin = (uint32_t) bsp_section_nocache_begin, \
85    .end = (uint32_t) bsp_section_nocache_end, \
86    .flags = ARMV7_MMU_DEVICE \
87  }, { \
88    .begin = (uint32_t) bsp_section_nocachenoload_begin, \
89    .end = (uint32_t) bsp_section_nocachenoload_end, \
90    .flags = ARMV7_MMU_DEVICE \
91  }, { \
92    .begin = (uint32_t) bsp_translation_table_base, \
93    .end = (uint32_t) bsp_translation_table_end, \
94    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
95  }
96
97BSP_START_DATA_SECTION extern const arm_cp15_start_section_config
98  arm_cp15_start_mmu_config_table[];
99
100BSP_START_DATA_SECTION extern const size_t
101  arm_cp15_start_mmu_config_table_size;
102
103BSP_START_TEXT_SECTION static inline void
104arm_cp15_start_set_translation_table_entries(
105  uint32_t *ttb,
106  const arm_cp15_start_section_config *config
107)
108{
109  uint32_t i = ARM_MMU_SECT_GET_INDEX(config->begin);
110  uint32_t iend =
111    ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
112  uint32_t index_mask = (1U << (32 - ARM_MMU_SECT_BASE_SHIFT)) - 1U;
113
114  if (config->begin != config->end) {
115    while (i != iend) {
116      ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | config->flags;
117      i = (i + 1U) & index_mask;
118    }
119  }
120}
121
122BSP_START_TEXT_SECTION static inline void
123arm_cp15_start_setup_translation_table(
124  uint32_t *ttb,
125  uint32_t client_domain,
126  const arm_cp15_start_section_config *config_table,
127  size_t config_count
128)
129{
130  uint32_t dac = ARM_CP15_DAC_DOMAIN(client_domain, ARM_CP15_DAC_CLIENT);
131  size_t i;
132
133  arm_cp15_set_domain_access_control(dac);
134  arm_cp15_set_translation_table_base(ttb);
135
136  /* Initialize translation table with invalid entries */
137  for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
138    ttb [i] = 0;
139  }
140
141  for (i = 0; i < config_count; ++i) {
142    arm_cp15_start_set_translation_table_entries(ttb, &config_table [i]);
143  }
144}
145
146BSP_START_TEXT_SECTION static inline void
147arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
148  uint32_t ctrl,
149  uint32_t *ttb,
150  uint32_t client_domain,
151  const arm_cp15_start_section_config *config_table,
152  size_t config_count
153)
154{
155  arm_cp15_start_setup_translation_table(
156    ttb,
157    client_domain,
158    config_table,
159    config_count
160  );
161
162  /* Enable MMU and cache */
163  ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
164
165  arm_cp15_set_control(ctrl);
166}
167
168BSP_START_TEXT_SECTION static inline uint32_t
169arm_cp15_start_setup_mmu_and_cache(uint32_t ctrl_clear, uint32_t ctrl_set)
170{
171  uint32_t ctrl = arm_cp15_get_control();
172
173  ctrl &= ~ctrl_clear;
174  ctrl |= ctrl_set;
175
176  arm_cp15_set_control(ctrl);
177
178  arm_cp15_tlb_invalidate();
179
180  return ctrl;
181}
182
183#ifdef __cplusplus
184}
185#endif /* __cplusplus */
186
187#endif /* LIBBSP_ARM_SHARED_ARM_CP15_START_H */
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