source: rtems/bsps/arm/imx/include/bsp/irq.h @ f8ad5bb2

Last change on this file since f8ad5bb2 was f8ad5bb2, checked in by Kinsey Moore <kinsey.moore@…>, on 08/28/20 at 03:13:47

bsps: Break out AArch32 GICv3 support

This breaks out AArch32-specific code so that the shared GICv3 code can
be reused by other architectures.
  • Property mode set to 100644
File size: 783 bytes
Line 
1/*
2 * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#ifndef LIBBSP_ARM_IMX_IRQ_H
16#define LIBBSP_ARM_IMX_IRQ_H
17
18#ifndef ASM
19
20#include <rtems/irq.h>
21#include <rtems/irq-extension.h>
22
23#include <dev/irq/arm-gic-irq.h>
24
25#ifdef __cplusplus
26extern "C" {
27#endif /* __cplusplus */
28
29#define BSP_INTERRUPT_VECTOR_MIN 0
30#define BSP_INTERRUPT_VECTOR_MAX 159
31#define BSP_INTERRUPT_VECTOR_INVALID (UINT32_MAX)
32
33#ifdef __cplusplus
34}
35#endif /* __cplusplus */
36
37#endif /* ASM */
38
39#endif /* LIBBSP_ARM_IMX_IRQ_H */
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