1 | /* |
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2 | * Copyright (c) 2017 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Dornierstr. 4 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <info@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #include <sys/param.h> |
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16 | |
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17 | #include <rtems/bspIo.h> |
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18 | #include <rtems/console.h> |
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19 | #include <rtems/sysinit.h> |
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20 | #include <rtems/termiostypes.h> |
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21 | |
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22 | #include <bsp.h> |
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23 | #include <bsp/fdt.h> |
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24 | #include <bsp/irq.h> |
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25 | |
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26 | #include <arm/freescale/imx/imx_ccmvar.h> |
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27 | #include <arm/freescale/imx/imx_uartreg.h> |
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28 | |
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29 | #include <libfdt.h> |
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30 | |
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31 | #define IMX_UART_TX_FIFO_LEVEL 16 |
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32 | |
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33 | typedef struct { |
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34 | rtems_termios_device_context base; |
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35 | volatile imx_uart *regs; |
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36 | #ifdef CONSOLE_USE_INTERRUPTS |
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37 | rtems_vector_number irq; |
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38 | int tx_in_progress; |
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39 | #endif |
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40 | } imx_uart_context; |
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41 | |
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42 | static imx_uart_context imx_uart_instances[7]; |
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43 | |
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44 | static imx_uart_context *imx_uart_console = &imx_uart_instances[0]; |
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45 | |
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46 | static volatile imx_uart *imx_uart_get_regs(rtems_termios_device_context *base) |
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47 | { |
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48 | imx_uart_context *ctx; |
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49 | |
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50 | ctx = (imx_uart_context *) base; |
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51 | return ctx->regs; |
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52 | } |
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53 | |
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54 | static void imx_uart_write_polled(rtems_termios_device_context *base, char c) |
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55 | { |
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56 | volatile imx_uart *regs; |
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57 | |
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58 | regs = imx_uart_get_regs(base); |
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59 | |
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60 | while ((regs->usr1 & IMX_UART_USR1_TRDY) == 0) { |
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61 | /* Wait */ |
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62 | } |
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63 | |
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64 | regs->utxd = IMX_UART_UTXD_TX_DATA(c); |
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65 | } |
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66 | |
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67 | static int imx_uart_read_polled(rtems_termios_device_context *base) |
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68 | { |
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69 | volatile imx_uart *regs; |
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70 | |
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71 | regs = imx_uart_get_regs(base); |
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72 | |
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73 | if ((regs->usr2 & IMX_UART_USR2_RDR) != 0) { |
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74 | return IMX_UART_URXD_RX_DATA_GET(regs->urxd); |
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75 | } else { |
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76 | return -1; |
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77 | } |
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78 | } |
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79 | |
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80 | void imx_uart_console_drain(void) |
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81 | { |
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82 | volatile imx_uart *regs; |
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83 | |
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84 | regs = imx_uart_get_regs(&imx_uart_console->base); |
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85 | |
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86 | if (regs != NULL) { |
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87 | while ((regs->usr2 & IMX_UART_USR2_TXFE) == 0) { |
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88 | /* Wait */ |
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89 | } |
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90 | } |
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91 | } |
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92 | |
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93 | static void imx_output_char(char c) |
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94 | { |
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95 | imx_uart_write_polled(&imx_uart_console->base, c); |
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96 | } |
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97 | |
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98 | static int imx_poll_char(void) |
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99 | { |
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100 | return imx_uart_read_polled(&imx_uart_console->base); |
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101 | } |
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102 | |
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103 | static void imx_uart_init_context( |
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104 | imx_uart_context *ctx, |
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105 | const char *fdt, |
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106 | const char *serial |
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107 | ) |
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108 | { |
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109 | int node; |
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110 | |
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111 | rtems_termios_device_context_initialize(&ctx->base, "UART"); |
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112 | node = fdt_path_offset(fdt, serial); |
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113 | ctx->regs = imx_get_reg_of_node(fdt, node); |
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114 | #ifdef CONSOLE_USE_INTERRUPTS |
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115 | ctx->irq = imx_get_irq_of_node(fdt, node, 0); |
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116 | #endif |
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117 | } |
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118 | |
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119 | static void imx_uart_probe(void) |
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120 | { |
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121 | const void *fdt; |
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122 | int node; |
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123 | int offset; |
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124 | const char *console; |
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125 | size_t i; |
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126 | |
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127 | fdt = bsp_fdt_get(); |
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128 | node = fdt_path_offset(fdt, "/chosen"); |
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129 | |
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130 | console = fdt_getprop(fdt, node, "stdout-path", NULL); |
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131 | if (console == NULL) { |
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132 | console = ""; |
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133 | } |
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134 | |
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135 | node = fdt_path_offset(fdt, "/aliases"); |
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136 | offset = fdt_first_property_offset(fdt, node); |
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137 | i = 0; |
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138 | |
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139 | while (offset >= 0 && i < RTEMS_ARRAY_SIZE(imx_uart_instances)) { |
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140 | const struct fdt_property *prop; |
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141 | |
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142 | prop = fdt_get_property_by_offset(fdt, offset, NULL); |
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143 | |
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144 | if (prop != NULL) { |
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145 | const char *name; |
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146 | |
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147 | name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); |
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148 | if (strstr(name, "serial") != NULL) { |
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149 | imx_uart_context *ctx; |
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150 | const char *serial; |
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151 | |
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152 | ctx = &imx_uart_instances[i]; |
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153 | serial = prop->data; |
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154 | |
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155 | if (strcmp(serial, console) == 0) { |
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156 | imx_uart_console = ctx; |
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157 | } |
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158 | |
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159 | imx_uart_init_context(ctx, fdt, serial); |
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160 | ++i; |
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161 | } |
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162 | } |
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163 | |
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164 | offset = fdt_next_property_offset(fdt, offset); |
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165 | } |
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166 | |
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167 | BSP_output_char = imx_output_char; |
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168 | BSP_poll_char = imx_poll_char; |
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169 | } |
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170 | |
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171 | static void imx_output_char_init(char c) |
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172 | { |
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173 | imx_uart_probe(); |
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174 | imx_output_char(c); |
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175 | } |
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176 | |
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177 | BSP_output_char_function_type BSP_output_char = imx_output_char_init; |
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178 | |
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179 | BSP_polling_getchar_function_type BSP_poll_char = NULL; |
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180 | |
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181 | #ifdef CONSOLE_USE_INTERRUPTS |
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182 | static void imx_uart_interrupt(void *arg) |
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183 | { |
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184 | rtems_termios_tty *tty; |
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185 | imx_uart_context *ctx; |
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186 | volatile imx_uart *regs; |
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187 | uint32_t usr2; |
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188 | |
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189 | tty = arg; |
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190 | ctx = rtems_termios_get_device_context(tty); |
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191 | regs = ctx->regs; |
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192 | usr2 = regs->usr2; |
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193 | |
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194 | regs->usr1 = IMX_UART_USR1_AGTIM; |
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195 | |
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196 | while ((usr2 & IMX_UART_USR2_RDR) != 0) { |
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197 | char c; |
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198 | |
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199 | c = IMX_UART_URXD_RX_DATA_GET(regs->urxd); |
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200 | rtems_termios_enqueue_raw_characters(tty, &c, 1); |
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201 | usr2 = regs->usr2; |
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202 | } |
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203 | |
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204 | if (ctx->tx_in_progress > 0 && (regs->usr1 & IMX_UART_USR1_TRDY) != 0) { |
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205 | rtems_termios_dequeue_characters(tty, ctx->tx_in_progress); |
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206 | } |
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207 | } |
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208 | #endif |
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209 | |
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210 | static bool imx_uart_set_attributes( |
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211 | rtems_termios_device_context *base, |
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212 | const struct termios *term |
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213 | ) |
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214 | { |
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215 | imx_uart_context *ctx; |
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216 | volatile imx_uart *regs; |
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217 | uint32_t ufcr; |
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218 | uint32_t baud; |
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219 | |
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220 | ctx = (imx_uart_context *) base; |
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221 | regs = imx_uart_get_regs(&ctx->base); |
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222 | |
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223 | baud = rtems_termios_baud_to_number(term->c_ospeed); |
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224 | |
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225 | if (baud != 0) { |
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226 | ufcr = regs->ufcr; |
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227 | ufcr = IMX_UART_UFCR_RFDIV_SET(ufcr, 0x5); |
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228 | regs->ufcr = ufcr; |
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229 | regs->ubir = 15; |
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230 | regs->ubmr = imx_ccm_uart_hz() / baud - 1; |
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231 | } |
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232 | |
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233 | return true; |
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234 | } |
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235 | |
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236 | static bool imx_uart_first_open( |
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237 | rtems_termios_tty *tty, |
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238 | rtems_termios_device_context *base, |
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239 | struct termios *term, |
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240 | rtems_libio_open_close_args_t *args |
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241 | ) |
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242 | { |
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243 | imx_uart_context *ctx; |
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244 | volatile imx_uart *regs; |
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245 | #ifdef CONSOLE_USE_INTERRUPTS |
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246 | rtems_status_code sc; |
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247 | uint32_t ufcr; |
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248 | #endif |
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249 | |
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250 | ctx = (imx_uart_context *) base; |
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251 | regs = imx_uart_get_regs(&ctx->base); |
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252 | |
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253 | regs->ucr1 = IMX_UART_UCR1_UARTEN; |
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254 | regs->ucr2 = IMX_UART_UCR2_IRTS | IMX_UART_UCR2_WS | IMX_UART_UCR2_RXEN |
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255 | | IMX_UART_UCR2_TXEN | IMX_UART_UCR2_SRST; |
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256 | regs->ucr3 |= IMX_UART_UCR3_ADNIMP | IMX_UART_UCR3_RXDMUXSEL; |
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257 | |
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258 | rtems_termios_set_initial_baud(tty, 115200); |
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259 | imx_uart_set_attributes(base, term); |
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260 | |
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261 | #ifdef CONSOLE_USE_INTERRUPTS |
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262 | ufcr = regs->ufcr; |
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263 | ufcr = IMX_UART_UFCR_RXTL_SET(ufcr, 16); |
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264 | ufcr = IMX_UART_UFCR_TXTL_SET(ufcr, IMX_UART_TX_FIFO_LEVEL); |
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265 | regs->ufcr = ufcr; |
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266 | regs->ucr1 |= IMX_UART_UCR1_RRDYEN; |
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267 | regs->ucr2 |= IMX_UART_UCR2_ATEN; |
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268 | sc = rtems_interrupt_handler_install( |
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269 | ctx->irq, |
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270 | "UART", |
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271 | RTEMS_INTERRUPT_SHARED, |
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272 | imx_uart_interrupt, |
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273 | tty |
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274 | ); |
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275 | if (sc != RTEMS_SUCCESSFUL) { |
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276 | return false; |
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277 | } |
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278 | #endif |
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279 | |
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280 | return true; |
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281 | } |
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282 | |
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283 | static void imx_uart_last_close( |
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284 | rtems_termios_tty *tty, |
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285 | rtems_termios_device_context *base, |
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286 | rtems_libio_open_close_args_t *args |
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287 | ) |
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288 | { |
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289 | #ifdef CONSOLE_USE_INTERRUPTS |
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290 | imx_uart_context *ctx; |
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291 | |
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292 | ctx = (imx_uart_context *) base; |
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293 | rtems_interrupt_handler_remove(ctx->irq, imx_uart_interrupt, tty); |
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294 | #endif |
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295 | } |
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296 | |
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297 | static void imx_uart_write( |
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298 | rtems_termios_device_context *base, |
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299 | const char *buf, |
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300 | size_t len |
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301 | ) |
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302 | { |
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303 | #ifdef CONSOLE_USE_INTERRUPTS |
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304 | imx_uart_context *ctx; |
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305 | volatile imx_uart *regs; |
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306 | int n; |
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307 | uint32_t ucr1; |
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308 | |
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309 | ctx = (imx_uart_context *) base; |
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310 | regs = imx_uart_get_regs(&ctx->base); |
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311 | ucr1 = regs->ucr1; |
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312 | |
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313 | if (len > 0) { |
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314 | int i; |
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315 | |
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316 | n = (int) MIN(len, IMX_UART_TX_FIFO_LEVEL); |
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317 | ucr1 |= IMX_UART_UCR1_TRDYEN; |
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318 | |
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319 | for (i = 0; i < n; ++i) { |
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320 | regs->utxd = IMX_UART_UTXD_TX_DATA(buf[i]); |
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321 | } |
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322 | } else { |
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323 | n = 0; |
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324 | ucr1 &= ~IMX_UART_UCR1_TRDYEN; |
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325 | } |
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326 | |
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327 | regs->ucr1 = ucr1; |
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328 | ctx->tx_in_progress = n; |
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329 | #else |
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330 | size_t i; |
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331 | |
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332 | for (i = 0; i < len; ++i) { |
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333 | imx_uart_write_polled(base, buf[i]); |
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334 | } |
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335 | #endif |
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336 | } |
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337 | |
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338 | static const rtems_termios_device_handler imx_uart_handler = { |
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339 | .first_open = imx_uart_first_open, |
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340 | .last_close = imx_uart_last_close, |
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341 | .write = imx_uart_write, |
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342 | .set_attributes = imx_uart_set_attributes, |
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343 | #ifdef CONSOLE_USE_INTERRUPTS |
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344 | .mode = TERMIOS_IRQ_DRIVEN |
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345 | #else |
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346 | .poll_read = imx_uart_read_polled, |
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347 | .mode = TERMIOS_POLLED |
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348 | #endif |
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349 | }; |
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350 | |
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351 | rtems_status_code console_initialize( |
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352 | rtems_device_major_number major, |
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353 | rtems_device_minor_number minor, |
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354 | void *arg |
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355 | ) |
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356 | { |
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357 | char path[] = "/dev/ttyS?"; |
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358 | size_t i; |
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359 | |
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360 | rtems_termios_initialize(); |
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361 | |
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362 | for (i = 0; i < RTEMS_ARRAY_SIZE(imx_uart_instances); ++i) { |
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363 | imx_uart_context *ctx; |
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364 | |
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365 | ctx = &imx_uart_instances[i]; |
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366 | path[sizeof(path) - 2] = (char) ('0' + i); |
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367 | |
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368 | rtems_termios_device_install( |
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369 | path, |
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370 | &imx_uart_handler, |
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371 | NULL, |
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372 | &ctx->base |
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373 | ); |
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374 | |
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375 | if (ctx == imx_uart_console) { |
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376 | link(path, CONSOLE_DEVICE_NAME); |
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377 | } |
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378 | } |
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379 | |
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380 | return RTEMS_SUCCESSFUL; |
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381 | } |
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382 | |
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383 | RTEMS_SYSINIT_ITEM( |
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384 | imx_uart_probe, |
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385 | RTEMS_SYSINIT_BSP_START, |
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386 | RTEMS_SYSINIT_ORDER_LAST_BUT_5 |
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387 | ); |
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