source: rtems/bsps/arm/gumstix/start/start.S @ a3fe23c

5
Last change on this file since a3fe23c was fbcd7c8f, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 20, 2018 at 8:19:28 AM

bsps: Move start files to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*
2 *  By Yang Xi <hiyangxi@gmail.com>.
3 *  Based upon CSB337
4 *
5 *  The license and distribution terms for this file may be
6 *  found in the file LICENSE in this distribution or at
7 *  http://www.rtems.org/license/LICENSE.
8 */
9
10#include <bsp/linker-symbols.h>
11
12/* Some standard definitions...*/
13.equ PSR_MODE_USR,       0x10
14.equ PSR_MODE_FIQ,       0x11
15.equ PSR_MODE_IRQ,       0x12
16.equ PSR_MODE_SVC,       0x13
17.equ PSR_MODE_ABT,       0x17
18.equ PSR_MODE_UNDEF,     0x1B
19.equ PSR_MODE_SYS,       0x1F
20
21.equ PSR_I,              0x80
22.equ PSR_F,              0x40
23.equ PSR_T,              0x20
24
25.text
26.globl  _start
27_start:
28        /*
29         * Since I don't plan to return to the bootloader,
30         * I don't have to save the registers.
31         *
32         * I'll just set the CPSR for SVC mode, interrupts
33         * off, and ARM instructions.
34         */
35        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
36        msr     cpsr, r0
37
38
39        /* zero the bss */
40        ldr     r1, =bsp_section_bss_end
41        ldr     r0, =bsp_section_bss_begin
42
43_bss_init:
44        mov     r2, #0
45        cmp     r0, r1
46        strlot  r2, [r0], #4
47        blo     _bss_init        /* loop while r0 < r1 */
48
49        /* --- Initialize stack pointer registers */
50        /* Enter IRQ mode and set up the IRQ stack pointer */
51        mov     r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)     /* No interrupts */
52        msr     cpsr, r0
53        ldr     r1, =bsp_stack_irq_size
54        ldr     sp, =bsp_stack_irq_begin
55        add     sp, sp, r1
56
57        /* Enter FIQ mode and set up the FIQ stack pointer */
58        mov     r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)     /* No interrupts */
59        msr     cpsr, r0
60        ldr     r1, =bsp_stack_fiq_size
61        ldr     sp, =bsp_stack_fiq_begin
62        add     sp, sp, r1
63
64        /* Enter ABT mode and set up the ABT stack pointer */
65        mov     r0, #(PSR_MODE_ABT | PSR_I | PSR_F)     /* No interrupts */
66        msr     cpsr, r0
67        ldr     r1, =bsp_stack_abt_size
68        ldr     sp, =bsp_stack_abt_begin
69        add     sp, sp, r1
70
71        /* Set up the SVC stack pointer last and stay in SVC mode */
72        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)     /* No interrupts */
73        msr     cpsr, r0
74        ldr     r1, =bsp_stack_und_size
75        ldr     sp, =bsp_stack_und_begin
76        add     sp, sp, r1
77        sub     sp, sp, #0x64
78
79        /*
80         * Initialize the MMU. After we return, the MMU is enabled,
81         * and memory may be remapped. I hope we don't remap this
82         * memory away.
83         */
84
85        ldr     r0, =mem_map
86        bl      mmu_init
87
88
89
90        /*
91         * Initialize the exception vectors. This includes the
92         * exceptions vectors (0x00000000-0x0000001c), and the
93         * pointers to the exception handlers (0x00000020-0x0000003c).
94         */
95        mov     r0, #0
96        adr     r1, vector_block
97        ldmia   r1!, {r2-r9}
98        stmia   r0!, {r2-r9}
99        ldmia   r1!, {r2-r9}
100        stmia   r0!, {r2-r9}
101
102
103
104        /* Now we are prepared to start the BSP's C code */
105        mov     r0, #0
106        bl      boot_card
107
108        /*
109         * Theoretically, we could return to what started us up,
110         * but we'd have to have saved the registers and stacks.
111         * Instead, we'll just reset.
112         */
113        bl      bsp_reset
114
115        /* We shouldn't get here. If we do, hang */
116_hang:  b       _hang
117
118
119/*
120 * This is the exception vector table and the pointers to
121 * the functions that handle the exceptions. It's a total
122 * of 16 words (64 bytes)
123 */
124vector_block:
125        ldr    pc, handler_addr_reset
126        ldr    pc, handler_addr_undef
127        ldr    pc, handler_addr_swi
128        ldr    pc, handler_addr_prefetch
129        ldr    pc, handler_addr_abort
130        nop
131        ldr    pc, handler_addr_irq
132        ldr    pc, handler_addr_fiq
133
134handler_addr_reset:
135        .word  bsp_reset
136
137handler_addr_undef:
138        .word  _ARMV4_Exception_undef_default
139
140handler_addr_swi:
141        .word  _ARMV4_Exception_swi_default
142
143handler_addr_prefetch:
144        .word  _ARMV4_Exception_pref_abort_default
145
146handler_addr_abort:
147        .word  _ARMV4_Exception_data_abort_default
148
149handler_addr_reserved:
150        .word  _ARMV4_Exception_reserved_default
151
152handler_addr_irq:
153        .word  _ARMV4_Exception_interrupt
154
155handler_addr_fiq:
156        .word  _ARMV4_Exception_fiq_default
Note: See TracBrowser for help on using the repository browser.