source: rtems/bsps/arm/edb7312/start/start.S @ ff081aee

Last change on this file since ff081aee was ff081aee, checked in by Sebastian Huber <sebastian.huber@…>, on Nov 6, 2018 at 3:58:02 PM

score: Rename interrupt stack symbols

Rename

  • _Configuration_Interrupt_stack_area_begin in _ISR_Stack_area_begin,
  • _Configuration_Interrupt_stack_area_end in _ISR_Stack_area_end, and
  • _Configuration_Interrupt_stack_size in _ISR_Stack_size.

Move definitions to <rtems/score/isr.h>. The new names are considerable
shorter and in the right namespace.

Update #3459.

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 * Cirrus EP7312 Startup code
3 *
4 * Copyright (c) 2010 embedded brains GmbH.
5 *
6 * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
7 *
8 * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.org/license/LICENSE.
13*/
14
15#include <rtems/asm.h>
16#include <rtems/score/cpu.h>
17
18.section ".bsp_start_text", "ax"
19.arm
20
21/*******************************************************
22 standard exception vectors table
23 *** Must be located at address 0
24********************************************************/
25
26Vector_Init_Block:
27        ldr    pc, handler_addr_reset
28        ldr    pc, handler_addr_undef
29        ldr    pc, handler_addr_swi
30        ldr    pc, handler_addr_prefetch
31        ldr    pc, handler_addr_abort
32        nop
33        ldr    pc, handler_addr_irq
34        ldr    pc, handler_addr_fiq
35
36handler_addr_reset:
37        .word  _start
38
39handler_addr_undef:
40        .word  _ARMV4_Exception_undef_default
41
42handler_addr_swi:
43        .word  _ARMV4_Exception_swi_default
44
45handler_addr_prefetch:
46        .word  _ARMV4_Exception_pref_abort_default
47
48handler_addr_abort:
49        .word  _ARMV4_Exception_data_abort_default
50
51handler_addr_reserved:
52        .word  _ARMV4_Exception_reserved_default
53
54handler_addr_irq:
55        .word  _ARMV4_Exception_interrupt
56
57handler_addr_fiq:
58        .word  _ARMV4_Exception_fiq_default
59
60        .globl  _start
61_start:
62        /* Set end of interrupt stack area */
63        ldr     r7, =_ISR_Stack_area_end
64
65        /* Enter FIQ mode and set up the FIQ stack pointer */
66        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
67        msr     cpsr, r0
68        ldr     r1, =bsp_stack_fiq_size
69        mov     sp, r7
70        sub     r7, r7, r1
71
72        /* Enter ABT mode and set up the ABT stack pointer */
73        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
74        msr     cpsr, r0
75        ldr     r1, =bsp_stack_abt_size
76        mov     sp, r7
77        sub     r7, r7, r1
78
79        /* Enter UND mode and set up the UND stack pointer */
80        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
81        msr     cpsr, r0
82        ldr     r1, =bsp_stack_und_size
83        mov     sp, r7
84        sub     r7, r7, r1
85
86        /* Enter IRQ mode and set up the IRQ stack pointer */
87        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
88        msr     cpsr, r0
89        mov     sp, r7
90
91        /*
92         * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack
93         * (interrupts are disabled).
94         */
95        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
96        msr     cpsr, r0
97        mov     sp, r7
98
99        /* Stay in SVC mode */
100/*
101 * Here is the code to initialize the low-level BSP environment
102 * (Chip Select, PLL, ....?)
103 */
104
105/* zero the bss */
106        LDR     r1, =bsp_section_bss_end   /* get end of ZI region */
107        LDR     r0, =bsp_section_bss_begin /* load base address of ZI region */
108
109zi_init:
110        MOV     r2, #0
111        CMP     r0, r1                 /* loop whilst r0 < r1 */
112        STRLOT   r2, [r0], #4
113        BLO     zi_init
114
115/* --- Now we enter the C code */
116
117        mov     r0, #0
118        bl      boot_card
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