source: rtems/bsps/arm/edb7312/start/start.S @ fbcd7c8f

5
Last change on this file since fbcd7c8f was fbcd7c8f, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 20, 2018 at 8:19:28 AM

bsps: Move start files to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 3.5 KB
Line 
1/*
2 * Cirrus EP7312 Startup code
3 *
4 * Copyright (c) 2010 embedded brains GmbH.
5 *
6 * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
7 *
8 * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.org/license/LICENSE.
13*/
14
15#include <bsp/linker-symbols.h>
16
17/* Some standard definitions...*/
18
19.equ Mode_USR,               0x10
20.equ Mode_FIQ,               0x11
21.equ Mode_IRQ,               0x12
22.equ Mode_SVC,               0x13
23.equ Mode_ABT,               0x17
24.equ Mode_ABORT,             0x17
25.equ Mode_UNDEF,             0x1B
26.equ Mode_SYS,               0x1F /*only available on ARM Arch. v4*/
27
28.equ I_Bit,                  0x80
29.equ F_Bit,                  0x40
30
31.section ".bsp_start_text", "ax"
32.arm
33
34/*******************************************************
35 standard exception vectors table
36 *** Must be located at address 0
37********************************************************/
38
39Vector_Init_Block:
40        ldr    pc, handler_addr_reset
41        ldr    pc, handler_addr_undef
42        ldr    pc, handler_addr_swi
43        ldr    pc, handler_addr_prefetch
44        ldr    pc, handler_addr_abort
45        nop
46        ldr    pc, handler_addr_irq
47        ldr    pc, handler_addr_fiq
48
49handler_addr_reset:
50        .word  _start
51
52handler_addr_undef:
53        .word  _ARMV4_Exception_undef_default
54
55handler_addr_swi:
56        .word  _ARMV4_Exception_swi_default
57
58handler_addr_prefetch:
59        .word  _ARMV4_Exception_pref_abort_default
60
61handler_addr_abort:
62        .word  _ARMV4_Exception_data_abort_default
63
64handler_addr_reserved:
65        .word  _ARMV4_Exception_reserved_default
66
67handler_addr_irq:
68        .word  _ARMV4_Exception_interrupt
69
70handler_addr_fiq:
71        .word  _ARMV4_Exception_fiq_default
72
73        .globl  _start
74_start:
75        /* store the sp */
76        mov     r12, sp
77/*
78 * Here is the code to initialize the low-level BSP environment
79 * (Chip Select, PLL, ....?)
80 */
81
82/* zero the bss */
83        LDR     r1, =bsp_section_bss_end   /* get end of ZI region */
84        LDR     r0, =bsp_section_bss_begin /* load base address of ZI region */
85
86zi_init:
87        MOV     r2, #0
88        CMP     r0, r1                 /* loop whilst r0 < r1 */
89        STRLOT   r2, [r0], #4
90        BLO     zi_init
91
92/* --- Initialise stack pointer registers */
93
94/* Enter IRQ mode and set up the IRQ stack pointer */
95    MOV     r0, #Mode_IRQ | I_Bit | F_Bit     /* No interrupts */
96    MSR     cpsr, r0
97    ldr     r1, =bsp_stack_irq_size
98    LDR     sp, =bsp_stack_irq_begin
99    add     sp, sp, r1
100    sub     sp, sp, #0x64
101
102/* Enter FIQ mode and set up the FIQ stack pointer */
103    MOV     r0, #Mode_FIQ | I_Bit | F_Bit     /* No interrupts */
104    MSR     cpsr, r0
105    ldr     r1, =bsp_stack_fiq_size
106    LDR     sp, =bsp_stack_fiq_begin
107    add     sp, sp, r1
108    sub     sp, sp, #0x64
109
110/* Enter ABT mode and set up the ABT stack pointer */
111    MOV     r0, #Mode_ABT | I_Bit | F_Bit     /* No interrupts */
112    MSR     cpsr, r0
113    ldr     r1, =bsp_stack_abt_size
114    LDR     sp, =bsp_stack_abt_begin
115    add     sp, sp, r1
116    sub     sp, sp, #0x64
117
118/* Set up the SVC stack pointer last and stay in SVC mode */
119    MOV     r0, #Mode_SVC | I_Bit | F_Bit     /* No interrupts */
120    MSR     cpsr, r0
121    ldr     r1, =bsp_stack_svc_size
122    LDR     sp, =bsp_stack_svc_begin
123    add     sp, sp, r1
124    sub     sp, sp, #0x64
125
126        /* save the original registers */
127        stmdb   sp!, {r4-r12, lr}
128
129/* --- Now we enter the C code */
130
131        mov     r0, #0
132        bl      boot_card
133
134        ldmia   sp!, {r4-r12, lr}
135        mov     sp, r12
136        mov     pc, lr
Note: See TracBrowser for help on using the repository browser.