source: rtems/bsps/arm/edb7312/start/start.S @ 511dc4b

5
Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.
  • Property mode set to 100644
File size: 3.2 KB
Line 
1/*
2 * Cirrus EP7312 Startup code
3 *
4 * Copyright (c) 2010 embedded brains GmbH.
5 *
6 * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
7 *
8 * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.org/license/LICENSE.
13*/
14
15#include <rtems/asm.h>
16#include <rtems/score/cpu.h>
17
18.section ".bsp_start_text", "ax"
19.arm
20
21/*******************************************************
22 standard exception vectors table
23 *** Must be located at address 0
24********************************************************/
25
26Vector_Init_Block:
27        ldr    pc, handler_addr_reset
28        ldr    pc, handler_addr_undef
29        ldr    pc, handler_addr_swi
30        ldr    pc, handler_addr_prefetch
31        ldr    pc, handler_addr_abort
32        nop
33        ldr    pc, handler_addr_irq
34        ldr    pc, handler_addr_fiq
35
36handler_addr_reset:
37        .word  _start
38
39handler_addr_undef:
40        .word  _ARMV4_Exception_undef_default
41
42handler_addr_swi:
43        .word  _ARMV4_Exception_swi_default
44
45handler_addr_prefetch:
46        .word  _ARMV4_Exception_pref_abort_default
47
48handler_addr_abort:
49        .word  _ARMV4_Exception_data_abort_default
50
51handler_addr_reserved:
52        .word  _ARMV4_Exception_reserved_default
53
54handler_addr_irq:
55        .word  _ARMV4_Exception_interrupt
56
57handler_addr_fiq:
58        .word  _ARMV4_Exception_fiq_default
59
60        .globl  _start
61_start:
62        /* Set end of interrupt stack area */
63        ldr     r7, =_Configuration_Interrupt_stack_area_end
64
65        /* Enter FIQ mode and set up the FIQ stack pointer */
66        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
67        msr     cpsr, r0
68        ldr     r1, =bsp_stack_fiq_size
69        mov     sp, r7
70        sub     r7, r7, r1
71
72        /* Enter ABT mode and set up the ABT stack pointer */
73        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
74        msr     cpsr, r0
75        ldr     r1, =bsp_stack_abt_size
76        mov     sp, r7
77        sub     r7, r7, r1
78
79        /* Enter UND mode and set up the UND stack pointer */
80        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
81        msr     cpsr, r0
82        ldr     r1, =bsp_stack_und_size
83        mov     sp, r7
84        sub     r7, r7, r1
85
86        /* Enter IRQ mode and set up the IRQ stack pointer */
87        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
88        msr     cpsr, r0
89        mov     sp, r7
90
91        /*
92         * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack
93         * (interrupts are disabled).
94         */
95        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
96        msr     cpsr, r0
97        mov     sp, r7
98
99        /* Stay in SVC mode */
100/*
101 * Here is the code to initialize the low-level BSP environment
102 * (Chip Select, PLL, ....?)
103 */
104
105/* zero the bss */
106        LDR     r1, =bsp_section_bss_end   /* get end of ZI region */
107        LDR     r0, =bsp_section_bss_begin /* load base address of ZI region */
108
109zi_init:
110        MOV     r2, #0
111        CMP     r0, r1                 /* loop whilst r0 < r1 */
112        STRLOT   r2, [r0], #4
113        BLO     zi_init
114
115/* --- Now we enter the C code */
116
117        mov     r0, #0
118        bl      boot_card
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