source: rtems/bsps/arm/csb337/start/start.S @ 511dc4b

Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on Jun 19, 2018 at 7:09:51 AM

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.

  • Property mode set to 100644
File size: 3.9 KB
Line 
1/*
2 * Cogent CSB337 startup code
3 *
4 * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.rtems.org/license/LICENSE.
9*/
10
11#include <rtems/asm.h>
12#include <rtems/score/cpu.h>
13
14.text
15.globl  _start
16_start:
17        /*
18         * Since I don't plan to return to the bootloader,
19         * I don't have to save the registers.
20         */
21
22        /* Set end of interrupt stack area */
23        ldr     r7, =_Configuration_Interrupt_stack_area_end
24
25        /* Enter FIQ mode and set up the FIQ stack pointer */
26        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
27        msr     cpsr, r0
28        ldr     r1, =bsp_stack_fiq_size
29        mov     sp, r7
30        sub     r7, r7, r1
31
32        /* Enter ABT mode and set up the ABT stack pointer */
33        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
34        msr     cpsr, r0
35        ldr     r1, =bsp_stack_abt_size
36        mov     sp, r7
37        sub     r7, r7, r1
38
39        /* Enter UND mode and set up the UND stack pointer */
40        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
41        msr     cpsr, r0
42        ldr     r1, =bsp_stack_und_size
43        mov     sp, r7
44        sub     r7, r7, r1
45
46        /* Enter IRQ mode and set up the IRQ stack pointer */
47        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
48        msr     cpsr, r0
49        mov     sp, r7
50
51        /*
52         * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack
53         * (interrupts are disabled).
54         */
55        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
56        msr     cpsr, r0
57        mov     sp, r7
58
59        /* Stay in SVC mode */
60
61        /* zero the bss */
62        ldr     r1, =bsp_section_bss_end
63        ldr     r0, =bsp_section_bss_begin
64
65_bss_init:
66        mov     r2, #0
67        cmp     r0, r1
68        strlot  r2, [r0], #4
69        blo     _bss_init        /* loop while r0 < r1 */
70
71        /*
72         * Initialize the MMU. After we return, the MMU is enabled,
73         * and memory may be remapped. I hope we don't remap this
74         * memory away.
75         */
76        ldr     r0, =mem_map
77        bl      mmu_init
78
79        /*
80         * Initialize the exception vectors. This includes the
81         * exceptions vectors (0x00000000-0x0000001c), and the
82         * pointers to the exception handlers (0x00000020-0x0000003c).
83         */
84        mov     r0, #0
85        adr     r1, vector_block
86        ldmia   r1!, {r2-r9}
87        stmia   r0!, {r2-r9}
88        ldmia   r1!, {r2-r9}
89        stmia   r0!, {r2-r9}
90
91        /* Now we are prepared to start the BSP's C code */
92        mov     r0, #0
93        bl      boot_card
94
95        /*
96         * Theoretically, we could return to what started us up,
97         * but we'd have to have saved the registers and stacks.
98         * Instead, we'll just reset.
99         */
100        bl      bsp_reset
101
102        /* We shouldn't get here. If we do, hang */
103_hang:  b       _hang
104
105
106/*
107 * This is the exception vector table and the pointers to
108 * the functions that handle the exceptions. It's a total
109 * of 16 words (64 bytes)
110 */
111vector_block:
112        ldr    pc, handler_addr_reset
113        ldr    pc, handler_addr_undef
114        ldr    pc, handler_addr_swi
115        ldr    pc, handler_addr_prefetch
116        ldr    pc, handler_addr_abort
117        nop
118        ldr    pc, handler_addr_irq
119        ldr    pc, handler_addr_fiq
120
121handler_addr_reset:
122        .word  bsp_reset
123
124handler_addr_undef:
125        .word  _ARMV4_Exception_undef_default
126
127handler_addr_swi:
128        .word  _ARMV4_Exception_swi_default
129
130handler_addr_prefetch:
131        .word  _ARMV4_Exception_pref_abort_default
132
133handler_addr_abort:
134        .word  _ARMV4_Exception_data_abort_default
135
136handler_addr_reserved:
137        .word  _ARMV4_Exception_reserved_default
138
139handler_addr_irq:
140        .word  _ARMV4_Exception_interrupt
141
142handler_addr_fiq:
143        .word  _ARMV4_Exception_fiq_default
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