source: rtems/bsps/arm/csb337/start/bspstart.c

Last change on this file was 9964895, checked in by Sebastian Huber <sebastian.huber@…>, on 04/20/18 at 08:35:35

bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 * Cogent CSB337 - AT91RM9200 Startup Code
3 *
4 *  Copyright (c) 2004 by Cogent Computer Systems
5 *  Written by Jay Monkman <jtm@lopingdog.com>
6 *
7 *  Modified by Joel Sherill
8 *  from OAR Corporation and
9 *  Fernando Nicodemos <fgnicodemos@terra.com.br>
10 *  from NCB - Sistemas Embarcados Ltda. (Brazil)
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.org/license/LICENSE.
15 */
16
17#include <bsp.h>
18#include <bsp/irq-generic.h>
19#include <at91rm9200.h>
20#include <at91rm9200_pmc.h>
21#include <at91rm9200_emac.h>
22#include <at91rm9200_gpio.h>
23#include <at91rm9200_usart.h>
24
25/* Function prototypes */
26static void fix_mac_addr(void);
27void bsp_usart_init(void);
28
29/*
30 * bsp_start_default - BSP initialization function
31 *
32 * This function is called before RTEMS is initialized and used
33 * adjust the kernel's configuration.
34 *
35 * This function also configures the CPU's memory protection unit.
36 *
37 * RESTRICTIONS/LIMITATIONS:
38 *   Since RTEMS is not configured, no RTEMS functions can be called.
39 */
40static void bsp_start_default( void )
41{
42  /* disable interrupts */
43  AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
44
45  /*
46   * Some versions of the bootloader have the MAC address
47   * reversed. This fixes it, if necessary.
48   */
49  fix_mac_addr();
50
51  /*
52   * Init rtems PIO configuration for USARTs
53   */
54  bsp_usart_init();
55
56  /*
57   * Init rtems interrupt management
58   */
59  bsp_interrupt_initialize();
60
61} /* bsp_start */
62
63/*
64 * Some versions of the bootloader shipped with the CSB337
65 * reverse the MAC address. This function tests for that,
66 * and fixes the MAC address.
67 */
68static void fix_mac_addr(void)
69{
70  uint8_t addr[6];
71
72  /* Read the MAC address */
73  addr[0] = (EMAC_REG(EMAC_SA1L) >>  0) & 0xff;
74  addr[1] = (EMAC_REG(EMAC_SA1L) >>  8) & 0xff;
75  addr[2] = (EMAC_REG(EMAC_SA1L) >> 16) & 0xff;
76  addr[3] = (EMAC_REG(EMAC_SA1L) >> 24) & 0xff;
77  addr[4] = (EMAC_REG(EMAC_SA1H) >>  0) & 0xff;
78  addr[5] = (EMAC_REG(EMAC_SA1H) >>  8) & 0xff;
79
80  /* Check which 3 bytes have Cogent's OUI */
81  if ((addr[5] == 0x00) && (addr[4] == 0x23) && (addr[3] == 0x31)) {
82      EMAC_REG(EMAC_SA1L) = ((addr[5] <<  0) |
83                             (addr[4] <<  8) |
84                             (addr[3] << 16) |
85                             (addr[2] << 24));
86
87      EMAC_REG(EMAC_SA1H) = ((addr[1] <<  0) |
88                             (addr[0] <<  8));
89  }
90}
91
92/*
93 *
94 * NAME: bsp_usart_init - Function to setup the PIO in USART mode
95 *       before startup
96 *
97 * DESCRIPTION:
98 *   This function is called before usart driver is initialized and is
99 *   used to setup the proper mode of PIO operation for USART.
100 *
101 * NOTES:
102 *   The initialization could be done smarter by programming only the
103 *   bits you need to program for each USART when the port is ENABLED.
104 *
105 */
106void bsp_usart_init(void)
107{
108  /*
109   * Configure shared pins for USARTs.
110   * Disables the PIO from controlling the corresponding pin.
111   */
112  PIOA_REG(PIO_PDR) |= ( BIT5  |   /* USART3 TXD3  */
113                         BIT6  |   /* USART3 RXD3  */
114                         BIT17 |   /* USART0 TXD0  */
115                         BIT18 |   /* USART0 RXD0  */
116                         BIT22 |   /* USART2 RXD2  */
117                         BIT23 );  /* USART2 TXD2  */
118
119  PIOB_REG(PIO_PDR) |= ( BIT20 |   /* USART1 TXD1  */
120                         BIT21 );  /* USART1 RXD1  */
121
122  /**** PIO Controller A - Pins you want in mode B ****/
123  PIOA_REG(PIO_BSR) |=  ( BIT5 |   /* USART3 TXD3  */ /* add */
124                          BIT6 );  /* USART3 RXD3  */
125  PIOA_REG(PIO_ASR) &= ~( BIT5 |   /* USART3 TXD3  */
126                          BIT6 );  /* USART3 RXD3  */
127
128  /**** PIO Controller A - Pins you want in mode A ****/
129  PIOA_REG(PIO_ASR) |=  ( BIT17 |   /* USART0 TXD0  */
130                          BIT18 |   /* USART0 RXD0  */
131                          BIT22 |   /* USART2 RXD2  */
132                          BIT23 );  /* USART2 TXD2  */
133  PIOA_REG(PIO_BSR) &= ~( BIT17 |   /* USART0 TXD0  */ /* add */
134                          BIT18 |   /* USART0 RXD0  */
135                          BIT22 |   /* USART2 RXD2  */
136                          BIT23 );  /* USART2 TXD2  */
137
138  /**** PIO Controller B - Pins you want in mode A ****/
139  PIOB_REG(PIO_ASR) |=  ( BIT20 |   /* USART1 TXD1  */
140                          BIT21 );  /* USART1 RXD1  */
141  PIOB_REG(PIO_BSR) &= ~( BIT20 |   /* USART1 TXD1  */
142                          BIT21 );  /* USART1 RXD1  */
143
144  /**** PIO Controller B - Pins you want in mode B ****/
145  /**** none ****/
146
147  /* Enable the clock to the USARTs */
148  PMC_REG(PMC_PCER) |= ( PMC_PCR_PID_US0 |   /* USART 0 Peripheral Clock */
149                         PMC_PCR_PID_US1 |   /* USART 1 Peripheral Clock */
150                         PMC_PCR_PID_US2 |   /* USART 2 Peripheral Clock */
151                         PMC_PCR_PID_US3 );  /* USART 3 Peripheral Clock */
152}
153
154/*
155 *  By making this a weak alias for bsp_start_default, a brave soul
156 *  can override the actual bsp_start routine used.
157 */
158void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
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