source: rtems/bsps/arm/csb336/start/memmap.c @ a3fe23c

5
Last change on this file since a3fe23c was 9964895, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 20, 2018 at 8:35:35 AM

bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 1.6 KB
Line 
1/*
2 *  CSB336 Memory Map
3 *
4 *  Copyright (c) 2004 by Cogent Computer Systems
5 *  Written by Jay Monkman <jtm@lopingdog.com>
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.org/license/LICENSE.
10 */
11#include <rtems.h>
12#include <libcpu/mmu.h>
13
14/* Remember, the ARM920 has 64 TLBs. If you have more 1MB sections than
15 * that, you'll have TLB lookups, which could hurt performance.
16 */
17mmu_sect_map_t mem_map[] = {
18/*  <phys addr>  <virt addr> <size> <flags> */
19    {0x08200000, 0x00000000,   1,    MMU_CACHE_WBACK},     /* Mirror of SDRAM */
20    {0x00100000, 0x00100000,   1,    MMU_CACHE_NONE},     /* Bootstrap ROM */
21    {0x00200000, 0x00200000,   2,    MMU_CACHE_NONE},     /* Internal Regs + eSRAM */
22
23    {0x08000000, 0x08000000,   1,    MMU_CACHE_NONE},     /* SDRAM */
24    {0x08100000, 0x08100000,   1,    MMU_CACHE_WTHROUGH}, /* SDRAM */
25    {0x08200000, 0x08200000,  30,    MMU_CACHE_WBACK},    /* SDRAM */
26
27    {0x10000000, 0x10000000,   8,    MMU_CACHE_NONE},     /* CS0 - Flash */
28    {0x12000000, 0x12000000,   1,    MMU_CACHE_NONE},     /* CS1 - enet */
29    {0x13000000, 0x13000000,   1,    MMU_CACHE_NONE},     /* CS2 - */
30    {0x14000000, 0x14000000,   1,    MMU_CACHE_NONE},     /* CS3 - */
31    {0x15000000, 0x15000000,   1,    MMU_CACHE_NONE},     /* CS4 - */
32    {0x16000000, 0x16000000,   1,    MMU_CACHE_NONE},     /* CS5 - */
33    {0x50000000, 0x50000000,   1,    MMU_CACHE_NONE},     /* ARM Test Regs */
34    {0x00000000, 0x00000000,   0,    0}                   /* The end */
35};
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