1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup arm_beagle |
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5 | * |
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6 | * @brief I2C support API. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2012 Claas Ziemke. All rights reserved. |
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11 | * |
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12 | * Claas Ziemke |
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13 | * Kernerstrasse 11 |
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14 | * 70182 Stuttgart |
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15 | * Germany |
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16 | * <claas.ziemke@gmx.net> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.org/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #ifndef LIBBSP_ARM_BEAGLE_I2C_H |
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24 | #define LIBBSP_ARM_BEAGLE_I2C_H |
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25 | |
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26 | #include <rtems.h> |
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27 | #include <bsp.h> |
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28 | #include <dev/i2c/i2c.h> |
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29 | |
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30 | #ifdef __cplusplus |
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31 | extern "C" { |
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32 | #endif /* __cplusplus */ |
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33 | |
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34 | #define BBB_I2C_SYSCLK 48000000 |
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35 | #define BBB_I2C_INTERNAL_CLK 12000000 |
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36 | |
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37 | #define BBB_I2C_0_BUS_PATH "/dev/i2c-0" |
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38 | #define BBB_I2C_1_BUS_PATH "/dev/i2c-1" |
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39 | #define BBB_I2C_2_BUS_PATH "/dev/i2c-2" |
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40 | |
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41 | #define BBB_I2C0_IRQ 70 |
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42 | #define BBB_I2C1_IRQ 71 |
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43 | #define BBB_I2C2_IRQ 30 |
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44 | |
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45 | typedef enum { |
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46 | I2C0, |
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47 | I2C1, |
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48 | I2C2, |
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49 | I2C_COUNT |
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50 | } bbb_i2c_id_t; |
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51 | |
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52 | typedef struct i2c_regs { |
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53 | uint32_t BBB_I2C_REVNB_LO; |
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54 | uint32_t BBB_I2C_REVNB_HI; |
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55 | uint32_t dummy1[ 2 ]; |
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56 | uint32_t BBB_I2C_SYSC; |
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57 | uint32_t dummy2[ 4 ]; |
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58 | uint32_t BBB_I2C_IRQSTATUS_RAW; |
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59 | uint32_t BBB_I2C_IRQSTATUS; |
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60 | uint32_t BBB_I2C_IRQENABLE_SET; |
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61 | uint32_t BBB_I2C_IRQENABLE_CLR; |
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62 | uint32_t BBB_I2C_WE; |
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63 | uint32_t BBB_I2C_DMARXENABLE_SET; |
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64 | uint32_t BBB_I2C_DMATXENABLE_SET; |
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65 | uint32_t BBB_I2C_DMARXENABLE_CLR; |
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66 | uint32_t BBB_I2C_DMATXENABLE_CLR; |
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67 | uint32_t BBB_I2C_DMARXWAKE_EN; |
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68 | uint32_t BBB_I2C_DMATXWAKE_EN; |
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69 | uint32_t dummy3[ 16 ]; |
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70 | uint32_t BBB_I2C_SYSS; |
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71 | uint32_t BBB_I2C_BUF; |
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72 | uint32_t BBB_I2C_CNT; |
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73 | uint32_t BBB_I2C_DATA; |
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74 | uint32_t dummy4; |
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75 | uint32_t BBB_I2C_CON; |
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76 | uint32_t BBB_I2C_OA; |
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77 | uint32_t BBB_I2C_SA; |
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78 | uint32_t BBB_I2C_PSC; |
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79 | uint32_t BBB_I2C_SCLL; |
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80 | uint32_t BBB_I2C_SCLH; |
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81 | uint32_t BBB_I2C_SYSTEST; |
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82 | uint32_t BBB_I2C_BUFSTAT; |
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83 | uint32_t BBB_I2C_OA1; |
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84 | uint32_t BBB_I2C_OA2; |
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85 | uint32_t BBB_I2C_OA3; |
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86 | uint32_t BBB_I2C_ACTOA; |
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87 | uint32_t BBB_I2C_SBLOCK; |
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88 | } bbb_i2c_regs; |
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89 | |
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90 | int am335x_i2c_bus_register( |
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91 | const char *bus_path, |
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92 | uintptr_t register_base, |
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93 | uint32_t input_clock, /* FIXME: Unused. Left for compatibility. */ |
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94 | rtems_vector_number irq |
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95 | ); |
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96 | |
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97 | static inline int bbb_register_i2c_0( void ) |
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98 | { |
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99 | return am335x_i2c_bus_register( |
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100 | BBB_I2C_0_BUS_PATH, |
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101 | AM335X_I2C0_BASE, |
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102 | I2C_BUS_CLOCK_DEFAULT, |
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103 | BBB_I2C0_IRQ |
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104 | ); |
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105 | } |
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106 | |
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107 | static inline int bbb_register_i2c_1( void ) |
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108 | { |
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109 | return am335x_i2c_bus_register( |
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110 | BBB_I2C_1_BUS_PATH, |
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111 | AM335X_I2C1_BASE, |
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112 | I2C_BUS_CLOCK_DEFAULT, |
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113 | BBB_I2C1_IRQ |
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114 | ); |
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115 | } |
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116 | |
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117 | static inline int bbb_register_i2c_2( void ) |
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118 | { |
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119 | return am335x_i2c_bus_register( |
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120 | BBB_I2C_2_BUS_PATH, |
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121 | AM335X_I2C2_BASE, |
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122 | I2C_BUS_CLOCK_DEFAULT, |
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123 | BBB_I2C2_IRQ |
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124 | ); |
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125 | } |
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126 | |
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127 | #ifdef __cplusplus |
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128 | } |
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129 | #endif /* __cplusplus */ |
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130 | |
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131 | #endif /* LIBBSP_ARM_BEAGLE_I2C_H */ |
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