source: rtems/bsps/arm/beagle/include/bsp/i2c.h @ 2afb22b

Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 5.5 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup arm_beagle
5 *
6 * @brief I2C support API.
7 */
8
9/*
10 * Copyright (c) 2012 Claas Ziemke. All rights reserved.
11 *
12 *  Claas Ziemke
13 *  Kernerstrasse 11
14 *  70182 Stuttgart
15 *  Germany
16 *  <claas.ziemke@gmx.net>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef LIBBSP_ARM_BEAGLE_I2C_H
24#define LIBBSP_ARM_BEAGLE_I2C_H
25
26#include <rtems.h>
27#include <dev/i2c/i2c.h>
28#include <bsp.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif /* __cplusplus */
33
34
35/* I2C Configuration Register (I2C_CON): */
36
37#define BBB_I2C_CON_EN  (1 << 15)  /* I2C module enable */
38#define BBB_I2C_CON_BE  (1 << 14)  /* Big endian mode */
39#define BBB_I2C_CON_STB (1 << 11)  /* Start byte mode (master mode only) */
40#define BBB_I2C_CON_MST (1 << 10)  /* Master/slave mode */
41#define BBB_I2C_CON_TRX (1 << 9)   /* Transmitter/receiver mode */
42           /* (master mode only) */
43#define BBB_I2C_CON_XA  (1 << 8)   /* Expand address */
44#define BBB_I2C_CON_STP (1 << 1)   /* Stop condition (master mode only) */
45#define BBB_I2C_CON_STT (1 << 0)   /* Start condition (master mode only) */
46#define BBB_I2C_CON_CLR 0x0  /* Clear configuration register */
47/* I2C Status Register (I2C_STAT): */
48
49#define BBB_I2C_STAT_SBD  (1 << 15) /* Single byte data */
50#define BBB_I2C_STAT_BB (1 << 12) /* Bus busy */
51#define BBB_I2C_STAT_ROVR (1 << 11) /* Receive overrun */
52#define BBB_I2C_STAT_XUDF (1 << 10) /* Transmit underflow */
53#define BBB_I2C_STAT_AAS  (1 << 9)  /* Address as slave */
54#define BBB_I2C_STAT_GC (1 << 5)
55#define BBB_I2C_STAT_XRDY (1 << 4)  /* Transmit data ready */
56#define BBB_I2C_STAT_RRDY (1 << 3)  /* Receive data ready */
57#define BBB_I2C_STAT_ARDY (1 << 2)  /* Register access ready */
58#define BBB_I2C_STAT_NACK (1 << 1)  /* No acknowledgment interrupt enable */
59#define BBB_I2C_STAT_AL (1 << 0)  /* Arbitration lost interrupt enable */
60
61/* I2C Interrupt Enable Register (I2C_IE): */
62#define BBB_I2C_IE_GC_IE  (1 << 5)
63#define BBB_I2C_IE_XRDY_IE  (1 << 4) /* Transmit data ready interrupt enable */
64#define BBB_I2C_IE_RRDY_IE  (1 << 3) /* Receive data ready interrupt enable */
65#define BBB_I2C_IE_ARDY_IE  (1 << 2) /* Register access ready interrupt enable */
66#define BBB_I2C_IE_NACK_IE  (1 << 1) /* No acknowledgment interrupt enable */
67#define BBB_I2C_IE_AL_IE  (1 << 0) /* Arbitration lost interrupt enable */
68
69/* I2C SYSC Register (I2C_SYSC): */
70#define BBB_I2C_SYSC_SRST (1 << 1)
71
72#define BBB_I2C_TIMEOUT 1000
73
74#define BBB_I2C_SYSS_RDONE            (1 << 0)  /* Internel reset monitoring */
75
76#define BBB_CONFIG_SYS_I2C_SPEED    100000
77#define BBB_CONFIG_SYS_I2C_SLAVE    1
78#define BBB_I2C_ALL_FLAGS 0x7FFF
79#define BBB_I2C_ALL_IRQ_FLAGS 0xFFFF
80
81#define BBB_I2C_SYSCLK 48000000
82#define BBB_I2C_INTERNAL_CLK 12000000
83#define BBB_I2C_SPEED_CLK 100000
84
85#define BBB_I2C_IRQ_ERROR \
86  ( AM335X_I2C_IRQSTATUS_NACK \
87    | AM335X_I2C_IRQSTATUS_ROVR \
88    | AM335X_I2C_IRQSTATUS_AL \
89    | AM335X_I2C_IRQSTATUS_ARDY \
90    | AM335X_I2C_IRQSTATUS_RRDY \
91    | AM335X_I2C_IRQSTATUS_XRDY \
92    | AM335X_I2C_IRQSTATUS_XUDF )
93
94#define BBB_I2C_IRQ_USED \
95  ( AM335X_I2C_IRQSTATUS_ARDY \
96    | AM335X_I2C_IRQSTATUS_XRDY )
97
98#define BBB_I2C_0_BUS_PATH "/dev/i2c-0"
99#define BBB_I2C_1_BUS_PATH "/dev/i2c-1"
100#define BBB_I2C_2_BUS_PATH "/dev/i2c-2"
101
102#define BBB_I2C0_IRQ 70
103#define BBB_I2C1_IRQ 71
104#define BBB_I2C2_IRQ 30
105
106#define BBB_MODE2 2
107#define BBB_MODE3 3
108
109typedef enum {
110  I2C0,
111  I2C1,
112  I2C2,
113  I2C_COUNT
114} bbb_i2c_id_t;
115
116typedef struct i2c_regs {
117  uint32_t BBB_I2C_REVNB_LO;
118  uint32_t BBB_I2C_REVNB_HI;
119  uint32_t dummy1[ 2 ];
120  uint32_t BBB_I2C_SYSC;
121  uint32_t dummy2[ 4 ];
122  uint32_t BBB_I2C_IRQSTATUS_RAW;
123  uint32_t BBB_I2C_IRQSTATUS;
124  uint32_t BBB_I2C_IRQENABLE_SET;
125  uint32_t BBB_I2C_IRQENABLE_CLR;
126  uint32_t BBB_I2C_WE;
127  uint32_t BBB_I2C_DMARXENABLE_SET;
128  uint32_t BBB_I2C_DMATXENABLE_SET;
129  uint32_t BBB_I2C_DMARXENABLE_CLR;
130  uint32_t BBB_I2C_DMATXENABLE_CLR;
131  uint32_t BBB_I2C_DMARXWAKE_EN;
132  uint32_t BBB_I2C_DMATXWAKE_EN;
133  uint32_t dummy3[ 16 ];
134  uint32_t BBB_I2C_SYSS;
135  uint32_t BBB_I2C_BUF;
136  uint32_t BBB_I2C_CNT;
137  uint32_t BBB_I2C_DATA;
138  uint32_t dummy4;
139  uint32_t BBB_I2C_CON;
140  uint32_t BBB_I2C_OA;
141  uint32_t BBB_I2C_SA;
142  uint32_t BBB_I2C_PSC;
143  uint32_t BBB_I2C_SCLL;
144  uint32_t BBB_I2C_SCLH;
145  uint32_t BBB_I2C_SYSTEST;
146  uint32_t BBB_I2C_BUFSTAT;
147  uint32_t BBB_I2C_OA1;
148  uint32_t BBB_I2C_OA2;
149  uint32_t BBB_I2C_OA3;
150  uint32_t BBB_I2C_ACTOA;
151  uint32_t BBB_I2C_SBLOCK;
152} bbb_i2c_regs;
153
154typedef struct bbb_i2c_bus {
155  i2c_bus base;
156  volatile bbb_i2c_regs *regs;
157  i2c_msg *msgs;
158  uint32_t msg_todo;
159  uint32_t current_msg_todo;
160  uint8_t *current_msg_byte;
161  uint32_t current_todo;
162  bool read;
163  bool hold;
164  rtems_id task_id;
165  rtems_vector_number irq;
166  uint32_t input_clock;
167  uint32_t already_transferred;
168} bbb_i2c_bus;
169
170int am335x_i2c_bus_register(
171  const char         *bus_path,
172  uintptr_t           register_base,
173  uint32_t            input_clock,
174  rtems_vector_number irq
175);
176
177static inline int bbb_register_i2c_0( void )
178{
179  return am335x_i2c_bus_register(
180    BBB_I2C_0_BUS_PATH,
181    AM335X_I2C0_BASE,
182    I2C_BUS_CLOCK_DEFAULT,
183    BBB_I2C0_IRQ
184  );
185}
186
187static inline int bbb_register_i2c_1( void )
188{
189  return am335x_i2c_bus_register(
190    BBB_I2C_1_BUS_PATH,
191    AM335X_I2C1_BASE,
192    I2C_BUS_CLOCK_DEFAULT,
193    BBB_I2C1_IRQ
194  );
195}
196
197static inline int bbb_register_i2c_2( void )
198{
199  return am335x_i2c_bus_register(
200    BBB_I2C_2_BUS_PATH,
201    AM335X_I2C2_BASE,
202    I2C_BUS_CLOCK_DEFAULT,
203    BBB_I2C2_IRQ
204  );
205}
206
207#ifdef __cplusplus
208}
209#endif /* __cplusplus */
210
211#endif /* LIBBSP_ARM_BEAGLE_I2C_H */
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