1 | /* ---------------------------------------------------------------------------- */ |
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2 | /* Atmel Microcontroller Software Support */ |
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3 | /* SAM Software Package License */ |
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4 | /* ---------------------------------------------------------------------------- */ |
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5 | /* Copyright (c) 2015, Atmel Corporation */ |
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6 | /* */ |
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7 | /* All rights reserved. */ |
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8 | /* */ |
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9 | /* Redistribution and use in source and binary forms, with or without */ |
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10 | /* modification, are permitted provided that the following condition is met: */ |
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11 | /* */ |
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12 | /* - Redistributions of source code must retain the above copyright notice, */ |
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13 | /* this list of conditions and the disclaimer below. */ |
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14 | /* */ |
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15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
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16 | /* this software without specific prior written permission. */ |
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17 | /* */ |
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18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
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19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
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20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
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21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
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22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
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23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
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24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
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25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
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26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
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27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
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28 | /* ---------------------------------------------------------------------------- */ |
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29 | |
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30 | #ifndef _XDMAD_H |
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31 | #define _XDMAD_H |
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32 | |
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33 | |
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34 | /*---------------------------------------------------------------------------- |
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35 | * Includes |
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36 | *----------------------------------------------------------------------------*/ |
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37 | |
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38 | #include "chip.h" |
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39 | #include <assert.h> |
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40 | |
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41 | |
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42 | /** \addtogroup dmad_defines DMA Driver Defines |
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43 | @{*/ |
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44 | /*---------------------------------------------------------------------------- |
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45 | * Consts |
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46 | *----------------------------------------------------------------------------*/ |
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47 | #define XDMAD_TRANSFER_MEMORY 0xFF /**< DMA transfer from or to memory */ |
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48 | #define XDMAD_ALLOC_FAILED 0xFFFF /**< Channel allocate failed */ |
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49 | |
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50 | #define XDMAD_TRANSFER_TX 0 |
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51 | #define XDMAD_TRANSFER_RX 1 |
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52 | |
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53 | /* XDMA_MBR_UBC */ |
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54 | #define XDMA_UBC_NDE (0x1u << 24) |
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55 | #define XDMA_UBC_NDE_FETCH_DIS (0x0u << 24) |
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56 | #define XDMA_UBC_NDE_FETCH_EN (0x1u << 24) |
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57 | #define XDMA_UBC_NSEN (0x1u << 25) |
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58 | #define XDMA_UBC_NSEN_UNCHANGED (0x0u << 25) |
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59 | #define XDMA_UBC_NSEN_UPDATED (0x1u << 25) |
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60 | #define XDMA_UBC_NDEN (0x1u << 26) |
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61 | #define XDMA_UBC_NDEN_UNCHANGED (0x0u << 26) |
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62 | #define XDMA_UBC_NDEN_UPDATED (0x1u << 26) |
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63 | #define XDMA_UBC_NVIEW_Pos 27 |
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64 | #define XDMA_UBC_NVIEW_Msk (0x3u << XDMA_UBC_NVIEW_Pos) |
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65 | #define XDMA_UBC_NVIEW_NDV0 (0x0u << XDMA_UBC_NVIEW_Pos) |
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66 | #define XDMA_UBC_NVIEW_NDV1 (0x1u << XDMA_UBC_NVIEW_Pos) |
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67 | #define XDMA_UBC_NVIEW_NDV2 (0x2u << XDMA_UBC_NVIEW_Pos) |
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68 | #define XDMA_UBC_NVIEW_NDV3 (0x3u << XDMA_UBC_NVIEW_Pos) |
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69 | |
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70 | /*---------------------------------------------------------------------------- |
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71 | * MACRO |
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72 | *----------------------------------------------------------------------------*/ |
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73 | |
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74 | /** @}*/ |
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75 | |
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76 | /*---------------------------------------------------------------------------- |
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77 | * Types |
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78 | *----------------------------------------------------------------------------*/ |
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79 | /** \addtogroup dmad_structs DMA Driver Structs |
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80 | @{*/ |
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81 | |
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82 | /** DMA status or return code */ |
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83 | typedef enum _XdmadStatus { |
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84 | XDMAD_OK = 0, /**< Operation is successful */ |
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85 | XDMAD_PARTIAL_DONE, |
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86 | XDMAD_DONE, |
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87 | XDMAD_BUSY, /**< Channel occupied or transfer not finished */ |
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88 | XDMAD_ERROR, /**< Operation failed */ |
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89 | XDMAD_CANCELED /**< Operation cancelled */ |
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90 | } eXdmadStatus, eXdmadRC; |
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91 | |
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92 | /** DMA state for channel */ |
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93 | typedef enum _XdmadState { |
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94 | XDMAD_STATE_FREE = 0, /**< Free channel */ |
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95 | XDMAD_STATE_ALLOCATED, /**< Allocated to some peripheral */ |
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96 | XDMAD_STATE_START, /**< DMA started */ |
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97 | XDMAD_STATE_IN_XFR, /**< DMA in transferring */ |
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98 | XDMAD_STATE_DONE, /**< DMA transfer done */ |
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99 | XDMAD_STATE_HALTED, /**< DMA transfer stopped */ |
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100 | } eXdmadState; |
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101 | |
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102 | /** DMA Programming state for channel */ |
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103 | typedef enum _XdmadProgState { |
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104 | XDMAD_SINGLE = 0, |
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105 | XDMAD_MULTI, |
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106 | XDMAD_LLI, |
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107 | } eXdmadProgState; |
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108 | |
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109 | /** DMA transfer callback */ |
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110 | typedef void (*XdmadTransferCallback)(uint32_t Channel, void *pArg); |
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111 | |
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112 | /** DMA driver channel */ |
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113 | typedef struct _XdmadChannel { |
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114 | XdmadTransferCallback fCallback; /**< Callback */ |
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115 | void *pArg; /**< Callback argument */ |
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116 | uint8_t bIrqOwner; /**< Uses DMA handler or external one */ |
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117 | uint8_t bSrcPeriphID; /**< HW ID for source */ |
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118 | uint8_t bDstPeriphID; /**< HW ID for destination */ |
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119 | uint8_t bSrcTxIfID; /**< DMA Tx Interface ID for source */ |
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120 | uint8_t bSrcRxIfID; /**< DMA Rx Interface ID for source */ |
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121 | uint8_t bDstTxIfID; /**< DMA Tx Interface ID for destination */ |
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122 | uint8_t bDstRxIfID; /**< DMA Rx Interface ID for destination */ |
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123 | volatile uint8_t state; /**< DMA channel state */ |
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124 | } sXdmadChannel; |
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125 | |
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126 | /** DMA driver instance */ |
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127 | typedef struct _Xdmad { |
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128 | Xdmac *pXdmacs; |
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129 | sXdmadChannel XdmaChannels[XDMACCHID_NUMBER]; |
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130 | uint8_t numControllers; |
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131 | uint8_t numChannels; |
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132 | uint8_t xdmaMutex; |
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133 | } sXdmad; |
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134 | |
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135 | typedef struct _XdmadCfg { |
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136 | /** Microblock Control Member. */ |
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137 | uint32_t mbr_ubc; |
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138 | /** Source Address Member. */ |
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139 | uint32_t mbr_sa; |
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140 | /** Destination Address Member. */ |
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141 | uint32_t mbr_da; |
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142 | /** Configuration Register. */ |
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143 | uint32_t mbr_cfg; |
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144 | /** Block Control Member. */ |
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145 | uint32_t mbr_bc; |
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146 | /** Data Stride Member. */ |
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147 | uint32_t mbr_ds; |
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148 | /** Source Microblock Stride Member. */ |
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149 | uint32_t mbr_sus; |
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150 | /** Destination Microblock Stride Member. */ |
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151 | uint32_t mbr_dus; |
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152 | } sXdmadCfg; |
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153 | |
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154 | /** \brief Structure for storing parameters for DMA view0 that can be |
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155 | * performed by the DMA Master transfer.*/ |
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156 | typedef struct _LinkedListDescriporView0 { |
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157 | /** Next Descriptor Address number. */ |
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158 | uint32_t mbr_nda; |
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159 | /** Microblock Control Member. */ |
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160 | uint32_t mbr_ubc; |
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161 | /** Transfer Address Member. */ |
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162 | uint32_t mbr_ta; |
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163 | } LinkedListDescriporView0; |
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164 | |
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165 | /** \brief Structure for storing parameters for DMA view1 that can be |
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166 | * performed by the DMA Master transfer.*/ |
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167 | typedef struct _LinkedListDescriporView1 { |
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168 | /** Next Descriptor Address number. */ |
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169 | uint32_t mbr_nda; |
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170 | /** Microblock Control Member. */ |
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171 | uint32_t mbr_ubc; |
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172 | /** Source Address Member. */ |
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173 | uint32_t mbr_sa; |
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174 | /** Destination Address Member. */ |
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175 | uint32_t mbr_da; |
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176 | } LinkedListDescriporView1; |
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177 | |
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178 | /** \brief Structure for storing parameters for DMA view2 that can be |
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179 | * performed by the DMA Master transfer.*/ |
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180 | typedef struct _LinkedListDescriporView2 { |
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181 | /** Next Descriptor Address number. */ |
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182 | uint32_t mbr_nda; |
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183 | /** Microblock Control Member. */ |
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184 | uint32_t mbr_ubc; |
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185 | /** Source Address Member. */ |
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186 | uint32_t mbr_sa; |
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187 | /** Destination Address Member. */ |
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188 | uint32_t mbr_da; |
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189 | /** Configuration Register. */ |
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190 | uint32_t mbr_cfg; |
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191 | } LinkedListDescriporView2; |
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192 | |
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193 | /** \brief Structure for storing parameters for DMA view3 that can be |
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194 | * performed by the DMA Master transfer.*/ |
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195 | typedef struct _LinkedListDescriporView3 { |
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196 | /** Next Descriptor Address number. */ |
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197 | uint32_t mbr_nda; |
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198 | /** Microblock Control Member. */ |
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199 | uint32_t mbr_ubc; |
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200 | /** Source Address Member. */ |
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201 | uint32_t mbr_sa; |
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202 | /** Destination Address Member. */ |
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203 | uint32_t mbr_da; |
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204 | /** Configuration Register. */ |
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205 | uint32_t mbr_cfg; |
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206 | /** Block Control Member. */ |
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207 | uint32_t mbr_bc; |
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208 | /** Data Stride Member. */ |
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209 | uint32_t mbr_ds; |
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210 | /** Source Microblock Stride Member. */ |
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211 | uint32_t mbr_sus; |
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212 | /** Destination Microblock Stride Member. */ |
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213 | uint32_t mbr_dus; |
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214 | } LinkedListDescriporView3; |
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215 | |
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216 | /** @}*/ |
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217 | |
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218 | extern sXdmad XDMAD_Instance; |
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219 | |
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220 | /*---------------------------------------------------------------------------- |
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221 | * Exported functions |
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222 | *----------------------------------------------------------------------------*/ |
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223 | /** \addtogroup dmad_functions DMA Driver Functions |
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224 | @{*/ |
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225 | extern uint32_t XDMAD_AllocateChannel(sXdmad *pXdmad, |
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226 | uint8_t bSrcID, uint8_t bDstID); |
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227 | extern eXdmadRC XDMAD_FreeChannel(sXdmad *pXdmad, uint32_t dwChannel); |
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228 | |
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229 | extern eXdmadRC XDMAD_ConfigureTransfer(sXdmad *pXdmad, |
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230 | uint32_t dwChannel, |
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231 | sXdmadCfg *pXdmaParam, |
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232 | uint32_t dwXdmaDescCfg, |
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233 | uint32_t dwXdmaDescAddr, |
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234 | uint32_t dwXdmaIntEn); |
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235 | |
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236 | extern eXdmadRC XDMAD_PrepareChannel(sXdmad *pXdmad, uint32_t dwChannel); |
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237 | |
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238 | extern eXdmadRC XDMAD_IsTransferDone(sXdmad *pXdmad, uint32_t dwChannel); |
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239 | |
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240 | extern eXdmadRC XDMAD_StartTransfer(sXdmad *pXdmad, uint32_t dwChannel); |
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241 | |
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242 | extern void XDMAD_DoNothingCallback(uint32_t Channel, void *pArg); |
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243 | |
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244 | extern eXdmadRC XDMAD_SetCallback(sXdmad *pXdmad, |
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245 | uint32_t dwChannel, |
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246 | XdmadTransferCallback fCallback, |
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247 | void *pArg); |
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248 | |
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249 | extern eXdmadRC XDMAD_StopTransfer(sXdmad *pXdmad, uint32_t dwChannel); |
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250 | /** @}*/ |
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251 | /**@}*/ |
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252 | #endif //#ifndef _XDMAD_H |
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253 | |
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