source: rtems/bsps/arm/atsam/include/libchip/include/usbhs.h @ 71c5552f

Last change on this file since 71c5552f was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 41.7 KB
Line 
1/* ---------------------------------------------------------------------------- */
2/*                  Atmel Microcontroller Software Support                      */
3/*                       SAM Software Package License                           */
4/* ---------------------------------------------------------------------------- */
5/* Copyright (c) 2015, Atmel Corporation                                        */
6/*                                                                              */
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10/* modification, are permitted provided that the following condition is met:    */
11/*                                                                              */
12/* - Redistributions of source code must retain the above copyright notice,     */
13/* this list of conditions and the disclaimer below.                            */
14/*                                                                              */
15/* Atmel's name may not be used to endorse or promote products derived from     */
16/* this software without specific prior written permission.                     */
17/*                                                                              */
18/* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
19/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
20/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */
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22/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
23/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */
24/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */
25/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */
26/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
27/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
28/* ---------------------------------------------------------------------------- */
29
30/** \file */
31
32#ifndef USBHS_H
33#define USBHS_H
34/** addtogroup usbd_hal
35 *@{
36 */
37
38#define  USB_DEVICE_HS_SUPPORT
39
40//! Control endpoint size
41#define  USB_DEVICE_EP_CTRL_SIZE       64
42
43/** Indicates chip has an UDP High Speed. */
44#define CHIP_USB_UDP
45
46/** Indicates chip has an internal pull-up. */
47#define CHIP_USB_PULLUP_INTERNAL
48
49/** Number of USB endpoints */
50#define CHIP_USB_NUMENDPOINTS   10
51
52/** Endpoints max packet size */
53#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(ep) \
54        ((ep == 0) ? 64 : 1024)
55
56/** Endpoints Number of Bank */
57#define CHIP_USB_ENDPOINTS_BANKS(ep)            ((ep==0)?1:((ep<=2)?3:2))
58
59
60#define CHIP_USB_ENDPOINTS_HBW(ep)               ((((ep)>=1) &&((ep)<=2))?true:false)
61
62/** Endpoints DMA support */
63#define CHIP_USB_ENDPOINTS_DMA(ep)              ((((ep)>=1)&&((ep)<=7))?true:false)
64
65/** Max size of the FMA FIFO */
66#define DMA_MAX_FIFO_SIZE     (65536/1)
67/** fifo space size in DW */
68#define EPT_VIRTUAL_SIZE      8192
69
70
71//! @name USBHS Host IP properties
72//!
73//! @{
74//! Get maximal number of endpoints
75#define uhd_get_pipe_max_nbr()                (9)
76#define USBHS_EPT_NUM                        (uhd_get_pipe_max_nbr()+1)
77//! Get maximal number of banks of endpoints
78#define uhd_get_pipe_bank_max_nbr(ep)         ((ep == 0) ? 1 : ((ep <= 2) ? 3 : 2))
79//! Get maximal size of endpoint (3X, 1024/64)
80#define uhd_get_pipe_size_max(ep)             (((ep) == 0) ? 64 : 1024)
81//! Get DMA support of endpoints
82#define Is_uhd_pipe_dma_supported(ep)         ((((ep) >= 1) && ((ep) <= 7)) ? true : false)
83//! Get High Band Width support of endpoints
84#define Is_uhd_pipe_high_bw_supported(ep)     (((ep) >= 2) ? true : false)
85//! @}
86
87typedef enum {
88        HOST_MODE = 0,
89        DEVICE_MODE = 1
90} USB_Mode_t;
91
92//! Maximum transfer size on USB DMA
93#define UHD_PIPE_MAX_TRANS 0x8000
94
95/**
96=================================
97        USBHS_CTRL
98=================================
99**/
100
101/**
102 * \brief Freeze or unfreeze USB clock
103 * \param pUsbhs   Pointer to an USBHS instance.
104 * \param Enable Enable or disable
105 */
106__STATIC_INLINE void USBHS_FreezeClock(Usbhs *pUsbhs)
107{
108        pUsbhs->USBHS_CTRL |= USBHS_CTRL_FRZCLK;
109}
110
111/**
112 * \brief Freeze or unfreeze USB clock
113 * \param pUsbhs   Pointer to an USBHS instance.
114 * \param Enable Enable or disable
115 */
116__STATIC_INLINE void USBHS_UnFreezeClock(Usbhs *pUsbhs)
117{
118        pUsbhs->USBHS_CTRL &= ~((uint32_t)USBHS_CTRL_FRZCLK);
119}
120/**
121 * \brief Freeze or unfreeze USB clock
122 * \param pUsbhs   Pointer to an USBHS instance.
123 * \param Enable Enable or disable
124 */
125__STATIC_INLINE void USBHS_VBusHWC(Usbhs *pUsbhs, uint8_t Enable)
126{
127
128        if (!Enable)
129                pUsbhs->USBHS_CTRL |= (1 << 8);
130        else
131                pUsbhs->USBHS_CTRL &= ~((uint32_t)(1 << 8));
132}
133
134/**
135 * \brief Enables or disables USB
136 * \param pUsbhs   Pointer to an USBHS instance.
137 * \param Enable Enable or disable
138 */
139
140__STATIC_INLINE void USBHS_UsbEnable(Usbhs *pUsbhs, uint8_t Enable)
141{
142        if (Enable)
143                pUsbhs->USBHS_CTRL |= USBHS_CTRL_USBE;
144        else
145                pUsbhs->USBHS_CTRL &= ~((uint32_t)USBHS_CTRL_USBE);
146}
147
148
149/**
150 * \brief Device or Host Mode
151 * \param pUsbhs   Pointer to an USBHS instance.
152 * \param Mode   Device or Host Mode
153 */
154
155__STATIC_INLINE void USBHS_UsbMode(Usbhs *pUsbhs, USB_Mode_t Mode)
156{
157        if (Mode)
158                pUsbhs->USBHS_CTRL |= USBHS_CTRL_UIMOD_DEVICE;
159        else
160                pUsbhs->USBHS_CTRL &= ~((uint32_t)USBHS_CTRL_UIMOD_DEVICE);
161}
162
163/********************* USBHS_SR  *****************/
164
165/**
166 * \brief Check if clock is usable or not
167 * \param pUsbhs   Pointer to an USBHS instance.
168 * \return 1 if USB clock is usable
169 */
170
171__STATIC_INLINE uint8_t USBHS_ISUsableClock(Usbhs *pUsbhs)
172{
173        return ((pUsbhs->USBHS_SR & USBHS_SR_CLKUSABLE) >> 14);
174}
175
176
177/**
178 * \brief Raise interrupt for endpoint.
179 * \param pUsbhs   Pointer to an USBHS instance.
180 * \return USB status
181 */
182
183__STATIC_INLINE uint32_t USBHS_ReadStatus(Usbhs *pUsbhs)
184{
185        return (pUsbhs->USBHS_SR);
186}
187
188/**
189 * \brief Enable or disable USB address
190 * \param pUsbhs   Pointer to an USBHS instance.
191 * \return USB speed status
192 */
193
194__STATIC_INLINE uint32_t USBHS_GetUsbSpeed(Usbhs *pUsbhs)
195{
196        return ((pUsbhs->USBHS_SR & USBHS_SR_SPEED_Msk));
197}
198
199
200/**
201 * \brief Enable or disable USB address
202 * \param pUsbhs   Pointer to an USBHS instance.
203 * \return USB speed status
204 */
205
206__STATIC_INLINE bool USBHS_IsUsbFullSpeed(Usbhs *pUsbhs)
207{
208        return ((pUsbhs->USBHS_SR & USBHS_SR_SPEED_Msk) == USBHS_SR_SPEED_FULL_SPEED) ?
209                   true : false;
210}
211
212
213/**
214 * \brief Enable or disable USB address
215 * \param pUsbhs   Pointer to an USBHS instance.
216 * \return USB speed status
217 */
218
219__STATIC_INLINE bool USBHS_IsUsbHighSpeed(Usbhs *pUsbhs)
220{
221        return ((pUsbhs->USBHS_SR & USBHS_SR_SPEED_Msk) == USBHS_SR_SPEED_HIGH_SPEED) ?
222                   true : false;
223}
224
225/**
226 * \brief Enable or disable USB address
227 * \param pUsbhs   Pointer to an USBHS instance.
228 * \return USB speed status
229 */
230
231__STATIC_INLINE bool USBHS_IsUsbLowSpeed(Usbhs *pUsbhs)
232{
233        return ((pUsbhs->USBHS_SR & USBHS_SR_SPEED_Msk) == USBHS_SR_SPEED_LOW_SPEED) ?
234                   true : false;
235}
236/********************* USBHS_SCR  *****************/
237
238/**
239 * \brief Raise interrupt for endpoint.
240 * \param pUsbhs   Pointer to an USBHS instance.
241 * \param AckType Interrupt Acknowledge type
242 */
243
244__STATIC_INLINE void USBHS_Ack(Usbhs *pUsbhs, uint32_t AckType)
245{
246        pUsbhs->USBHS_SCR |= AckType;
247}
248
249/********************* USBHS_SFR  *****************/
250
251/**
252 * \brief Raise interrupt for endpoint.
253 * \param pUsbhs   Pointer to an USBHS instance.
254 * \param SetStatus Set USB status
255 */
256
257__STATIC_INLINE void USBHS_Set(Usbhs *pUsbhs, uint32_t SetStatus)
258{
259        pUsbhs->USBHS_SFR |= SetStatus;
260}
261
262
263/*--------------------------------------------------------
264* =========== USB Device functions ======================
265*---------------------------------------------------------*/
266
267/**
268 * \brief Enable or disable USB address
269 * \param pUsbhs   Pointer to an USBHS instance.
270 * \param SetStatus Set USB status
271 */
272
273__STATIC_INLINE void USBHS_EnableAddress(Usbhs *pUsbhs, uint8_t Enable)
274{
275        if (Enable)
276                pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_ADDEN;
277        else
278                pUsbhs->USBHS_DEVCTRL &= ~((uint32_t)USBHS_DEVCTRL_ADDEN);
279}
280
281/**
282 * \brief Configure USB address and enable or disable it
283 * \param pUsbhs   Pointer to an USBHS instance.
284 * \param Addr   USB device status
285 */
286
287__STATIC_INLINE void USBHS_SetAddress(Usbhs *pUsbhs, uint8_t Addr)
288{
289        pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_UADD(Addr);
290        pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_ADDEN;
291}
292
293/**
294 * \brief Get USB address
295 * \param pUsbhs   Pointer to an USBHS instance.
296 */
297
298__STATIC_INLINE uint8_t USBHS_GetAddress(Usbhs *pUsbhs)
299{
300        return (pUsbhs->USBHS_DEVCTRL & USBHS_DEVCTRL_UADD_Msk);
301}
302
303/**
304 * \brief Attach or detach USB.
305 * \param pUsbhs   Pointer to an USBHS instance.
306 * \param Enable Attachs or detach USB device
307 */
308
309__STATIC_INLINE void USBHS_DetachUsb(Usbhs *pUsbhs, uint8_t Enable)
310{
311        if (Enable)
312                pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_DETACH;
313        else
314                pUsbhs->USBHS_DEVCTRL &= ~((uint32_t)USBHS_DEVCTRL_DETACH);
315
316}
317
318/**
319 * \brief Force Low Speed mode
320 * \param pUsbhs   Pointer to an USBHS instance.
321 * \param Enable Enables the Full speed
322 */
323
324__STATIC_INLINE void USBHS_ForceLowSpeed(Usbhs *pUsbhs, uint8_t Enable)
325{
326        if (Enable)
327                pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_LS;
328        else
329                pUsbhs->USBHS_DEVCTRL &= ~((uint32_t)USBHS_DEVCTRL_LS);
330}
331
332/**
333 * \brief Disable/Enables High Speed mode
334 * \param pUsbhs   Pointer to an USBHS instance.
335 * \param Enable Enables/disable option
336 */
337
338__STATIC_INLINE void USBHS_EnableHighSpeed(Usbhs *pUsbhs, uint8_t Enable)
339{
340        uint32_t cfg = pUsbhs->USBHS_DEVCTRL;
341        cfg &= ~((uint32_t)USBHS_DEVCTRL_SPDCONF_Msk);
342
343        if (Enable)
344                pUsbhs->USBHS_DEVCTRL |= cfg;
345        else
346                pUsbhs->USBHS_DEVCTRL |= (cfg | USBHS_DEVCTRL_SPDCONF_FORCED_FS);
347
348}
349
350/**
351 * \brief Set Remote WakeUp mode
352 * \param pUsbhs   Pointer to an USBHS instance.
353 */
354
355__STATIC_INLINE void USBHS_SetRemoteWakeUp(Usbhs *pUsbhs)
356{
357        pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_RMWKUP;
358}
359
360/**
361 * \brief Disable/Enables Test mode
362 * \param pUsbhs   Pointer to an USBHS instance.
363 * \param mode Enables/disable option
364 */
365
366__STATIC_INLINE void USBHS_EnableTestMode(Usbhs *pUsbhs, uint32_t mode)
367{
368        pUsbhs->USBHS_DEVCTRL |= mode;
369}
370
371
372/**
373 * \brief Disable/Enables HS Test mode
374 * \param pUsbhs   Pointer to an USBHS instance.
375 */
376
377__STATIC_INLINE void USBHS_EnableHSTestMode(Usbhs *pUsbhs)
378{
379        pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_SPDCONF_HIGH_SPEED;
380}
381
382/**
383 * \brief Read status for an interrupt
384 * \param pUsbhs   Pointer to an USBHS instance.
385 * \param IntType Interrupt type
386 */
387
388__STATIC_INLINE uint32_t USBHS_ReadIntStatus(Usbhs *pUsbhs, uint32_t IntType)
389{
390        return (pUsbhs->USBHS_DEVISR & IntType);
391}
392
393/**
394 * \brief Read status for an Endpoint
395 * \param pUsbhs   Pointer to an USBHS instance.
396 * \param EpNum  Endpoint
397 */
398
399__STATIC_INLINE uint32_t USBHS_ReadEpIntStatus(Usbhs *pUsbhs, uint8_t EpNum)
400{
401        return (pUsbhs->USBHS_DEVISR & (USBHS_DEVISR_PEP_0 << EpNum));
402}
403
404/**
405 * \brief Read status for a DMA Endpoint
406 * \param pUsbhs   Pointer to an USBHS instance.
407 * \param DmaNum  DMA Endpoint
408 */
409__STATIC_INLINE uint32_t USBHS_ReadDmaIntStatus(Usbhs *pUsbhs, uint8_t DmaNum)
410{
411        return (pUsbhs->USBHS_DEVISR & (USBHS_DEVISR_DMA_1 << DmaNum));
412}
413
414/**
415 * \brief Acknowledge interrupt for endpoint.
416 * \param pUsbhs   Pointer to an USBHS instance.
417 * \param IntType Interrupt Type
418 */
419
420__STATIC_INLINE void USBHS_AckInt(Usbhs *pUsbhs, uint32_t IntType)
421{
422        pUsbhs->USBHS_DEVICR |=  IntType;
423}
424
425/**
426 * \brief Raise interrupt for endpoint.
427 * \param pUsbhs   Pointer to an USBHS instance.
428 * \param IntType Interrupt Type
429 */
430
431
432__STATIC_INLINE void USBHS_RaiseInt(Usbhs *pUsbhs, uint32_t IntType)
433{
434        pUsbhs->USBHS_DEVIFR |=  IntType;
435}
436
437/**
438 * \brief Raise DMA interrupt for endpoint.
439 * \param pUsbhs   Pointer to an USBHS instance.
440 * \param IntType Interrupt Type
441 */
442__STATIC_INLINE void USBHS_RaiseDmaInt(Usbhs *pUsbhs, uint8_t Dma)
443{
444        assert(Dma < USBHSDEVDMA_NUMBER);
445        pUsbhs->USBHS_DEVIFR |=  (USBHS_DEVIFR_DMA_1 << Dma);
446}
447
448/**
449 * \brief check for interrupt of endpoint.
450 * \param pUsbhs   Pointer to an USBHS instance.
451 * \param IntType Interrupt Type
452 */
453
454__STATIC_INLINE uint32_t USBHS_IsIntEnable(Usbhs *pUsbhs, uint32_t IntType)
455{
456        return (pUsbhs->USBHS_DEVIMR &  IntType);
457}
458
459/**
460 * \brief Check if endpoint's interrupt is enabled for a given endpoint number
461 * \param pUsbhs   Pointer to an USBHS instance.
462 * \param EpNum Endpoint number
463 */
464
465__STATIC_INLINE uint32_t USBHS_IsIntEnableEP(Usbhs *pUsbhs, uint8_t EpNum)
466{
467        return (pUsbhs->USBHS_DEVIMR &  (USBHS_DEVIMR_PEP_0 << EpNum));
468}
469
470
471/**
472 * \brief Check if endpoint's DMA interrupt is enabled for a given endpoint
473 * DMA number
474 * \param pUsbhs   Pointer to an USBHS instance.
475 * \param DmaNum Endpoint's DMA number
476 */
477
478__STATIC_INLINE uint32_t USBHS_IsDmaIntEnable(Usbhs *pUsbhs, uint8_t DmaNum)
479{
480        return (pUsbhs->USBHS_DEVIMR &  (USBHS_DEVIMR_DMA_1 << DmaNum));
481}
482
483
484/**
485 * \brief Enables Interrupt
486 * \param pUsbhs   Pointer to an USBHS instance.
487 * \param IntType Interrupt Type
488 */
489__STATIC_INLINE void USBHS_EnableInt(Usbhs *pUsbhs, uint32_t IntType)
490{
491        pUsbhs->USBHS_DEVIER |=  IntType;
492}
493
494/**
495 * \brief Enables interrupt for a given endpoint.
496 * \param pUsbhs   Pointer to an USBHS instance.
497 * \param DmaNum Endpoint's DMA number
498 */
499__STATIC_INLINE void USBHS_EnableIntEP(Usbhs *pUsbhs, uint8_t EpNum)
500{
501        pUsbhs->USBHS_DEVIER |=  (USBHS_DEVIER_PEP_0 << EpNum);
502}
503
504/**
505 * \brief Enables DMA interrupt for a given endpoint.
506 * \param pUsbhs   Pointer to an USBHS instance.
507 * \param DmaEp  Endpoint's DMA interrupt number
508 */
509
510__STATIC_INLINE void USBHS_EnableDMAIntEP(Usbhs *pUsbhs, uint32_t DmaEp)
511{
512        assert(DmaEp < USBHSDEVDMA_NUMBER);
513        pUsbhs->USBHS_DEVIER |=  (USBHS_DEVIER_DMA_1 << DmaEp);
514}
515
516/**
517* \brief Disables interrupt for endpoint.
518* \param pUsbhs   Pointer to an USBHS instance.
519* \param IntType Int type
520*/
521
522__STATIC_INLINE void USBHS_DisableInt(Usbhs *pUsbhs, uint32_t IntType)
523{
524        pUsbhs->USBHS_DEVIDR |=  IntType;
525}
526
527/**
528* \brief Disables interrupt for endpoint.
529* \param pUsbhs  Pointer to an USBHS instance.
530* \param Ep    Endpoint number
531*/
532
533__STATIC_INLINE void USBHS_DisableIntEP(Usbhs *pUsbhs, uint8_t Ep)
534{
535        pUsbhs->USBHS_DEVIDR |=  (USBHS_DEVIDR_PEP_0 << Ep);
536}
537
538/**
539* \brief Disables DMA interrupt for endpoint.
540* \param pUsbhs  Pointer to an USBHS instance.
541* \param DmaEp Endpoint's DMA number
542*/
543__STATIC_INLINE void USBHS_DisableDMAIntEP(Usbhs *pUsbhs, uint8_t DmaEp)
544{
545        assert(DmaEp < USBHSDEVDMA_NUMBER);
546        pUsbhs->USBHS_DEVIDR |=  (USBHS_DEVIDR_DMA_1 << DmaEp);
547}
548
549
550/**
551* \brief Enables or disables endpoint.
552* \param pUsbhs  Pointer to an USBHS instance.
553* \param Enable Enable/disable endpoint
554*/
555
556__STATIC_INLINE void USBHS_EnableEP(Usbhs *pUsbhs, uint8_t Ep, uint8_t Enable)
557{
558        if (Enable)
559                pUsbhs->USBHS_DEVEPT |= (USBHS_DEVEPT_EPEN0 << Ep);
560        else
561                pUsbhs->USBHS_DEVEPT &= ~(uint32_t)(USBHS_DEVEPT_EPEN0 << Ep);
562
563}
564
565
566/**
567* \brief Rests Endpoint
568* \param pUsbhs  Pointer to an USBHS instance.
569* \param Ep    Endpoint Number
570*/
571
572__STATIC_INLINE void USBHS_ResetEP(Usbhs *pUsbhs, uint8_t Ep)
573{
574        pUsbhs->USBHS_DEVEPT |=  (USBHS_DEVEPT_EPRST0 << Ep);
575        pUsbhs->USBHS_DEVEPT &=  ~(uint32_t)(USBHS_DEVEPT_EPRST0 << Ep);
576}
577
578/**
579* \brief Checks if Endpoint is enable
580* \param pUsbhs  Pointer to an USBHS instance.
581* \param Ep    Endpoint Number
582*/
583
584__STATIC_INLINE uint32_t USBHS_IsEPEnabled(Usbhs *pUsbhs, uint8_t Ep)
585{
586        return (pUsbhs->USBHS_DEVEPT & (USBHS_DEVEPT_EPEN0 << Ep));
587}
588
589/**
590* \brief Get MicrFrame number
591* \param pUsbhs  Pointer to an USBHS instance.
592* \retruns Micro frame number
593*/
594__STATIC_INLINE uint8_t USBHS_GetMicroFrameNum(Usbhs *pUsbhs)
595{
596        return (pUsbhs->USBHS_DEVFNUM & USBHS_DEVFNUM_MFNUM_Msk);
597}
598
599
600/**
601* \brief Get Frame number
602* \param pUsbhs  Pointer to an USBHS instance.
603* \retruns frame number
604*/
605__STATIC_INLINE uint8_t USBHS_GetFrameNum(Usbhs *pUsbhs)
606{
607        return ((pUsbhs->USBHS_DEVFNUM & USBHS_DEVFNUM_FNUM_Msk)
608                         >> USBHS_DEVFNUM_FNUM_Pos);
609}
610
611/**
612* \brief Get Frame number CRC error
613* \param pUsbhs  Pointer to an USBHS instance.
614* \retruns Frame number error status
615*/
616__STATIC_INLINE uint8_t USBHS_GetFrameNumCrcErr(Usbhs *pUsbhs)
617{
618        return ((pUsbhs->USBHS_DEVFNUM & USBHS_DEVFNUM_FNCERR) >> 15);
619}
620
621/*-----------------------------------------
622* =========== USB Device's Endpoint functions ========
623*------------------------------------------*/
624
625/**
626 * Set Endpoints configuration
627 * Bank size, type and direction
628 */
629__STATIC_INLINE void USBHS_ConfigureEPs(Usbhs *pUsbhs, const uint8_t Ep,
630                                                                                const uint8_t Type, const uint8_t Dir,
631                                                                                const uint8_t Size, const uint8_t Bank)
632{
633
634        pUsbhs->USBHS_DEVEPTCFG[Ep] |=
635                ((Size << USBHS_DEVEPTCFG_EPSIZE_Pos) & USBHS_DEVEPTCFG_EPSIZE_Msk);
636        pUsbhs->USBHS_DEVEPTCFG[Ep] |=
637                ((Dir << 8) & USBHS_DEVEPTCFG_EPDIR);
638        pUsbhs->USBHS_DEVEPTCFG[Ep] |=
639                (((Type) << USBHS_DEVEPTCFG_EPTYPE_Pos) & USBHS_DEVEPTCFG_EPTYPE_Msk);
640        pUsbhs->USBHS_DEVEPTCFG[Ep] |=
641                (((Bank) << USBHS_DEVEPTCFG_EPBK_Pos) & USBHS_DEVEPTCFG_EPBK_Msk);
642}
643
644
645/**
646 * Enable or disable Auto switch of banks
647 */
648__STATIC_INLINE void USBHS_AutoSwitchBankEnable(Usbhs *pUsbhs, uint8_t Ep,
649                uint8_t Enable)
650{
651        if (Enable)
652                pUsbhs->USBHS_DEVEPTCFG[Ep] |= USBHS_DEVEPTCFG_AUTOSW;
653        else
654                pUsbhs->USBHS_DEVEPTCFG[Ep] &= ~((uint32_t)USBHS_DEVEPTCFG_AUTOSW);
655}
656
657
658/**
659 * Allocate Endpoint memory
660 */
661__STATIC_INLINE void USBHS_AllocateMemory(Usbhs *pUsbhs, uint8_t Ep)
662{
663        pUsbhs->USBHS_DEVEPTCFG[Ep] |= USBHS_DEVEPTCFG_ALLOC;
664}
665
666
667/**
668 * Free allocated Endpoint memory
669 */
670__STATIC_INLINE void USBHS_FreeMemory(Usbhs *pUsbhs, uint8_t Ep)
671{
672        pUsbhs->USBHS_DEVEPTCFG[Ep] &= ~((uint32_t)USBHS_DEVEPTCFG_ALLOC);
673}
674
675
676/**
677 * Get Endpoint configuration
678 */
679__STATIC_INLINE uint32_t USBHS_GetConfigureEPs(Usbhs *pUsbhs, uint8_t Ep,
680                uint32_t IntType)
681{
682        return ((pUsbhs->USBHS_DEVEPTCFG[Ep]) & IntType);
683}
684
685/**
686 * Get Endpoint Type
687 */
688__STATIC_INLINE uint8_t USBHS_GetEpType(Usbhs *pUsbhs, uint8_t Ep)
689{
690        return ((pUsbhs->USBHS_DEVEPTCFG[Ep] & USBHS_DEVEPTCFG_EPTYPE_Msk)
691                        >> USBHS_DEVEPTCFG_EPTYPE_Pos);
692}
693
694/**
695 * Get Endpoint Size
696 */
697__STATIC_INLINE uint32_t USBHS_GetEpSize(Usbhs *pUsbhs, uint8_t Ep)
698{
699        return (8 << ((pUsbhs->USBHS_DEVEPTCFG[Ep] & USBHS_DEVEPTCFG_EPSIZE_Msk)
700                                        >> USBHS_DEVEPTCFG_EPSIZE_Pos));
701}
702
703
704/**
705 * Sets ISO endpoint's Number of Transfer for High Speed
706 */
707__STATIC_INLINE void USBHS_SetIsoTrans(Usbhs *pUsbhs, uint8_t Ep,
708                                                                           uint8_t nbTrans)
709{
710        pUsbhs->USBHS_DEVEPTCFG[Ep] |= USBHS_DEVEPTCFG_NBTRANS(nbTrans);
711}
712
713/**
714 * Check for interrupt types enabled for a given endpoint
715 */
716__STATIC_INLINE uint32_t USBHS_IsEpIntEnable(Usbhs *pUsbhs, uint8_t Ep,
717                uint32_t EpIntType)
718{
719        return (pUsbhs->USBHS_DEVEPTIMR[Ep] & EpIntType);
720}
721
722
723/**
724 * Enables an interrupt type for a given endpoint
725 */
726__STATIC_INLINE void USBHS_EnableEPIntType(Usbhs *pUsbhs, uint8_t Ep,
727                uint32_t EpInt)
728{
729        pUsbhs->USBHS_DEVEPTIER[Ep] |=  EpInt;
730}
731
732/**
733 * Enables an interrupt type for a given endpoint
734 */
735__STATIC_INLINE uint32_t USBHS_IsBankKilled(Usbhs *pUsbhs, uint8_t Ep)
736{
737        return (pUsbhs->USBHS_DEVEPTIMR[Ep] & USBHS_DEVEPTIMR_KILLBK);
738}
739
740/**
741 * Enables an interrupt type for a given endpoint
742 */
743__STATIC_INLINE void USBHS_KillBank(Usbhs *pUsbhs, uint8_t Ep)
744{
745        pUsbhs->USBHS_DEVEPTIER[Ep] =  USBHS_DEVEPTIER_KILLBKS;
746}
747/**
748 * Disables an interrupt type for a given endpoint
749 */
750__STATIC_INLINE void USBHS_DisableEPIntType(Usbhs *pUsbhs, uint8_t Ep,
751                uint32_t EpInt)
752{
753        pUsbhs->USBHS_DEVEPTIDR[Ep] |=  EpInt;
754}
755
756/**
757 * Clears register/acknowledge for a given endpoint
758 */
759__STATIC_INLINE void USBHS_AckEpInterrupt(Usbhs *pUsbhs, uint8_t Ep,
760                uint32_t EpInt)
761{
762        pUsbhs->USBHS_DEVEPTICR[Ep] |=  EpInt;
763}
764
765/**
766 * Sets/Raise register for a given endpoint
767 */
768__STATIC_INLINE void USBHS_RaiseEPInt(Usbhs *pUsbhs, uint8_t Ep, uint32_t EpInt)
769{
770        pUsbhs->USBHS_DEVEPTIFR[Ep] |=  EpInt;
771}
772
773/**
774 * Gets interrupt status for a given EP
775 */
776__STATIC_INLINE uint32_t USBHS_ReadEPStatus(Usbhs *pUsbhs, uint8_t Ep,
777                uint32_t EpInt)
778{
779        return (pUsbhs->USBHS_DEVEPTISR[Ep] & EpInt);
780}
781
782/**
783 * Check if given endpoint's bank is free
784 */
785__STATIC_INLINE uint8_t USBHS_IsBankFree(Usbhs *pUsbhs, uint8_t Ep)
786{
787        if ((pUsbhs->USBHS_DEVEPTISR[Ep] & USBHS_DEVEPTISR_NBUSYBK_Msk))
788                return false;
789        else
790                return true;
791}
792
793/**
794 * Read endpoint's bank number in use
795 */
796__STATIC_INLINE uint8_t USBHS_NumOfBanksInUse(Usbhs *pUsbhs, uint8_t Ep)
797{
798        return ((pUsbhs->USBHS_DEVEPTISR[Ep] & USBHS_DEVEPTISR_NBUSYBK_Msk)
799                         >> USBHS_DEVEPTISR_NBUSYBK_Pos);
800}
801
802
803/**
804 * Read endpoint's byte count of the FIFO
805 */
806__STATIC_INLINE uint16_t USBHS_ByteCount(Usbhs *pUsbhs, uint8_t Ep)
807{
808        return (uint16_t)((pUsbhs->USBHS_DEVEPTISR[Ep] & USBHS_DEVEPTISR_BYCT_Msk)
809                                           >> USBHS_DEVEPTISR_BYCT_Pos);
810}
811
812/*--------------------------------------------------------
813* =========== USB Device's Ep's DMA functions =========
814*---------------------------------------------------------*/
815
816/**
817* \brief Sets DMA next descriptor address
818* \param pUsbDma  USBHS device DMA instance
819* \param Desc NDA address
820*/
821__STATIC_INLINE void USBHS_SetDmaNDA(UsbhsDevdma *pUsbDma, uint32_t Desc)
822{
823        pUsbDma->USBHS_DEVDMANXTDSC = Desc;
824}
825
826/**
827* \brief Gets DMA next descriptor address
828* \param pUsbDma  USBHS device DMA instance
829* \return Next DMA descriptor
830*/
831__STATIC_INLINE uint32_t USBHS_GetDmaNDA(UsbhsDevdma *pUsbDma)
832{
833        return (pUsbDma->USBHS_DEVDMANXTDSC);
834}
835
836/**
837* \brief Sets USBHS's DMA Buffer addresse
838* \param pUsbDma  USBHS device DMA instance
839* \param Addr  DMA's buffer Addrs
840*/
841__STATIC_INLINE void USBHS_SetDmaBuffAdd(UsbhsDevdma *pUsbDma, uint32_t Addr)
842{
843        pUsbDma->USBHS_DEVDMAADDRESS = Addr;
844}
845
846
847/**
848* \brief Gets USBHS's DMA Buffer addresse
849* \param pUsbDma  USBHS device DMA instance
850* \return DMA addrs
851*/
852__STATIC_INLINE uint32_t USBHS_GetDmaBuffAdd(UsbhsDevdma *pUsbDma)
853{
854        return (pUsbDma->USBHS_DEVDMAADDRESS);
855}
856
857/**
858* \brief Setup the USBHS DMA
859* \param pUsbDma  USBHS device DMA instance
860* \param Cfg  DMA's configuration
861*/
862__STATIC_INLINE void USBHS_ConfigureDma(UsbhsDevdma *pUsbDma, uint32_t Cfg)
863{
864        pUsbDma->USBHS_DEVDMACONTROL |= Cfg;
865}
866
867/**
868* \brief Get DMA configuration
869* \param pUsbDma  USBHS device DMA instance
870* \return DMA control setup
871*/
872__STATIC_INLINE uint32_t USBHS_GetDmaConfiguration(UsbhsDevdma *pUsbDma)
873{
874        return (pUsbDma->USBHS_DEVDMACONTROL);
875}
876
877
878/**
879* \brief Set DMA status
880* \param pUsbDma  USBHS device DMA instance
881* \Status Set DMA status
882*/
883__STATIC_INLINE void USBHS_SetDmaStatus(UsbhsDevdma *pUsbDma, uint32_t Status)
884{
885        pUsbDma->USBHS_DEVDMASTATUS = Status;
886}
887
888
889/**
890* \brief Get Dma Status
891* \param pUsbDma  USBHS device DMA instance
892* \return Dma status
893*/
894__STATIC_INLINE uint32_t USBHS_GetDmaStatus(UsbhsDevdma *pUsbDma)
895{
896        return (pUsbDma->USBHS_DEVDMASTATUS);
897}
898
899
900/**
901* \brief Get DMA buffer's count
902* \param pUsbDma  USBHS device DMA instance
903* \return Buffer count
904*/
905__STATIC_INLINE uint16_t USBHS_GetDmaBuffCount(UsbhsDevdma *pUsbDma)
906{
907        return ((pUsbDma->USBHS_DEVDMASTATUS & USBHS_DEVDMASTATUS_BUFF_COUNT_Msk)
908                         >> USBHS_DEVDMASTATUS_BUFF_COUNT_Pos);
909}
910
911
912/*--------------------------------------------------------
913* =========== USB Host Functions  ========================
914*---------------------------------------------------------*/
915
916/** Number of USB endpoints */
917#define CHIP_USB_NUMPIPE            10
918/** Number of USB endpoints */
919#define CHIP_USB_DMA_NUMPIPE        7
920
921/** Endpoints max paxcket size */
922#define CHIP_USB_PIPE_MAXPACKETSIZE(ep) \
923        ((ep == 0) ? 64 : 1024)
924
925/** Endpoints Number of Bank */
926#define CHIP_USB_PIPE_BANKS(ep)                 ((ep==0)?1:((ep<=2)?3:2))
927
928
929#define CHIP_USB_PIPE_HBW(ep)                   ((((ep)>=1) &&((ep)<=2))?true:false)
930
931/** Endpoints DMA support */
932#define CHIP_USB_PIPE_DMA(ep)                   ((((ep)>=1)&&((ep)<=7))?true:false)
933
934/**
935* \brief Sets USB host's speed to Normal , it sets to HS from FS
936* \param pUsbhs  USBHS host instance
937*/
938__STATIC_INLINE void USBHS_SetHostHighSpeed(Usbhs *pUsbhs)
939{
940        pUsbhs->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_SPDCONF_Msk;
941        pUsbhs->USBHS_HSTCTRL |= USBHS_HSTCTRL_SPDCONF_NORMAL;
942}
943
944/**
945* \brief Sets USB host's speed to Low speed
946* \param pUsbhs  USBHS host instance
947*/
948__STATIC_INLINE void USBHS_SetHostLowSpeed(Usbhs *pUsbhs)
949{
950        pUsbhs->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_SPDCONF_Msk;
951        pUsbhs->USBHS_HSTCTRL |= USBHS_HSTCTRL_SPDCONF_LOW_POWER;
952}
953
954/**
955* \brief Sets USB host's speed to forced Full speed
956* \param pUsbhs  USBHS host instance
957*/
958__STATIC_INLINE void USBHS_SetHostForcedFullSpeed(Usbhs *pUsbhs)
959{
960        pUsbhs->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_SPDCONF_Msk;
961        pUsbhs->USBHS_HSTCTRL |= USBHS_HSTCTRL_SPDCONF_FORCED_FS;
962}
963
964/**
965* \brief Sets USB host sends reste signal on USB Bus
966* \param pUsbhs  USBHS host instance
967*/
968__STATIC_INLINE void USBHS_Reset(void)
969{
970        USBHS->USBHS_HSTCTRL |= USBHS_HSTCTRL_RESET;
971}
972
973/**
974* \brief Sets USB host sends reste signal on USB Bus
975* \param pUsbhs  USBHS host instance
976*/
977__STATIC_INLINE void USBHS_StopReset(void)
978{
979        USBHS->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_RESET;
980}
981
982/**
983* \brief Sets USB host send Resume on USB bus
984* \param pUsbhs  USBHS host instance
985*/
986__STATIC_INLINE void USBHS_Resume(void)
987{
988        USBHS->USBHS_HSTCTRL |= USBHS_HSTCTRL_RESUME;
989}
990
991/**
992* \brief Sets USB host Enable the Generation of  Start of Frame
993* \param pUsbhs  USBHS host instance
994*/
995__STATIC_INLINE void USBHS_EnableSOF(Usbhs *pUsbhs)
996{
997        pUsbhs->USBHS_HSTCTRL |= USBHS_HSTCTRL_SOFE;
998}
999
1000/**
1001* \brief Sets USB host Enable the Generation of  Start of Frame
1002* \param pUsbhs  USBHS host instance
1003*/
1004__STATIC_INLINE uint8_t USBHS_IsEnableSOF(Usbhs *pUsbhs)
1005{
1006        return (pUsbhs->USBHS_HSTCTRL & USBHS_HSTCTRL_SOFE) >> 8;
1007}
1008/**
1009* \brief Sets USB host disable the Generation of  Start of Frame
1010* \param pUsbhs  USBHS host instance
1011*/
1012__STATIC_INLINE void USBHS_DisableSOF(void)
1013{
1014        USBHS->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_SOFE;
1015}
1016
1017/**
1018* \brief Gets USB host interrupt status
1019* \param pUsbhs  USBHS host instance
1020*/
1021__STATIC_INLINE uint32_t USBHS_GetHostStatus(Usbhs *pUsbhs, uint8_t IntType)
1022{
1023        return (pUsbhs->USBHS_HSTISR & IntType);
1024}
1025
1026
1027/**
1028 * \brief Gets USB host interrupt status
1029 * \param pUsbhs  USBHS host instance
1030 */
1031__STATIC_INLINE uint32_t USBHS_GetHostPipeStatus(Usbhs *pUsbhs, uint8_t PipeInt)
1032{
1033        assert(PipeInt < CHIP_USB_NUMPIPE);
1034        return (pUsbhs->USBHS_HSTISR & (USBHS_HSTISR_PEP_0 << PipeInt));
1035}
1036
1037
1038/**
1039 * \brief Gets USB host interrupt status
1040 * \param pUsbhs  USBHS host instance
1041 */
1042__STATIC_INLINE uint32_t USBHS_GetHostDmaPipeStatus(Usbhs *pUsbhs,
1043                uint8_t PipeInt)
1044{
1045        assert(PipeInt);
1046        assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1047        return (pUsbhs->USBHS_HSTISR & (USBHS_HSTISR_DMA_1 << PipeInt));
1048}
1049
1050/**
1051 * \brief Gets USB host interrupt status
1052 * \param pUsbhs  USBHS host instance
1053 */
1054__STATIC_INLINE void USBHS_ClearHostStatus(Usbhs *pUsbhs, uint32_t IntType)
1055{
1056        pUsbhs->USBHS_HSTICR = IntType;
1057}
1058
1059/**
1060 * \brief Gets USB host interrupt status
1061 * \param pUsbhs  USBHS host instance
1062 */
1063__STATIC_INLINE void USBHS_SetHostStatus(Usbhs *pUsbhs, uint32_t IntType)
1064{
1065        pUsbhs->USBHS_HSTIFR = IntType;
1066}
1067
1068/**
1069 * \brief Gets USB host interrupt status
1070 * \param pUsbhs  USBHS host instance
1071 */
1072__STATIC_INLINE void USBHS_SetHostDmaStatus(Usbhs *pUsbhs, uint8_t PipeInt)
1073{
1074        assert(PipeInt);
1075        assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1076        pUsbhs->USBHS_HSTIFR =  (USBHS_HSTIFR_DMA_1 << PipeInt);
1077}
1078
1079/*** Interrupt Mask ****/
1080/**
1081 * \brief Gets USB host interrupt status
1082 * \param pUsbhs  USBHS host instance
1083 */
1084__STATIC_INLINE uint8_t USBHS_IsHostIntEnable(Usbhs *pUsbhs, uint8_t IntType)
1085{
1086        return (pUsbhs->USBHS_HSTIMR & IntType);
1087}
1088
1089/**
1090 * \brief Gets USB host interrupt status
1091 * \param pUsbhs  USBHS host instance
1092 */
1093__STATIC_INLINE uint32_t USBHS_IsHostPipeIntEnable(Usbhs *pUsbhs,
1094                uint8_t PipeInt)
1095{
1096        assert(PipeInt < CHIP_USB_NUMPIPE);
1097        return (pUsbhs->USBHS_HSTIMR & (USBHS_HSTIMR_PEP_0 << PipeInt));
1098}
1099
1100/**
1101 * \brief Gets USB host interrupt status
1102 * \param pUsbhs  USBHS host instance
1103 */
1104__STATIC_INLINE uint32_t USBHS_IsHostDmaIntEnable(Usbhs *pUsbhs,
1105                uint8_t PipeInt)
1106{
1107        assert(PipeInt);
1108        assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1109        return (pUsbhs->USBHS_HSTIMR & (USBHS_HSTIMR_DMA_1 << PipeInt));
1110}
1111
1112/*** Interrupt Disable ****/
1113/**
1114 * \brief Gets USB host interrupt status
1115 * \param pUsbhs  USBHS host instance
1116 */
1117__STATIC_INLINE void USBHS_HostIntDisable(Usbhs *pUsbhs, uint32_t IntType)
1118{
1119        pUsbhs->USBHS_HSTIDR = IntType;
1120}
1121
1122/**
1123 * \brief Gets USB host interrupt status
1124 * \param pUsbhs  USBHS host instance
1125 */
1126__STATIC_INLINE void USBHS_HostPipeIntDisable(Usbhs *pUsbhs, uint8_t PipeInt)
1127{
1128        assert(PipeInt < CHIP_USB_NUMPIPE);
1129        pUsbhs->USBHS_HSTIDR  = (USBHS_HSTIDR_PEP_0 << PipeInt);
1130}
1131
1132/**
1133 * \brief Gets USB host interrupt status
1134 * \param pUsbhs  USBHS host instance
1135 */
1136__STATIC_INLINE void USBHS_HostDmaIntDisable(Usbhs *pUsbhs, uint8_t PipeInt)
1137{
1138        assert(PipeInt);
1139        assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1140        pUsbhs->USBHS_HSTIDR = (USBHS_HSTIDR_DMA_1 << PipeInt);
1141}
1142
1143/*** Interrupt Enable ****/
1144
1145/**
1146 * \brief Gets USB host interrupt status
1147 * \param pUsbhs  USBHS host instance
1148 */
1149__STATIC_INLINE void USBHS_HostIntEnable(Usbhs *pUsbhs, uint32_t IntType)
1150{
1151        pUsbhs->USBHS_HSTIER = IntType;
1152}
1153
1154/**
1155 * \brief Gets USB host interrupt status
1156 * \param pUsbhs  USBHS host instance
1157 */
1158__STATIC_INLINE void USBHS_HostPipeIntEnable(Usbhs *pUsbhs, uint8_t PipeInt)
1159{
1160        assert(PipeInt < CHIP_USB_NUMPIPE);
1161        pUsbhs->USBHS_HSTIER = (USBHS_HSTIER_PEP_0 << PipeInt);
1162}
1163
1164/**
1165 * \brief Gets USB host interrupt status
1166 * \param pUsbhs  USBHS host instance
1167 */
1168__STATIC_INLINE void USBHS_HostDmaIntEnable(Usbhs *pUsbhs, uint8_t PipeInt)
1169{
1170        assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1171        pUsbhs->USBHS_HSTIER |= (USBHS_HSTIER_DMA_1 << PipeInt);
1172}
1173
1174/**
1175 * \brief Gets USB host interrupt status
1176 * \param pUsbhs  USBHS host instance
1177 */
1178__STATIC_INLINE uint16_t USBHS_HostGetSOF(void)
1179{
1180        return ((USBHS->USBHS_HSTFNUM & USBHS_HSTFNUM_FNUM_Msk) >>
1181                         USBHS_HSTFNUM_FNUM_Pos);
1182}
1183
1184/**
1185 * \brief Gets USB host interrupt status
1186 * \param pUsbhs  USBHS host instance
1187 */
1188__STATIC_INLINE uint16_t USBHS_HostGetFramePos(void)
1189{
1190        return ((USBHS->USBHS_HSTFNUM & USBHS_HSTFNUM_FLENHIGH_Msk) >>
1191                         USBHS_HSTFNUM_FLENHIGH_Pos);
1192}
1193
1194
1195/**
1196 * \brief Gets USB host interrupt status
1197 * \param pUsbhs  USBHS host instance
1198 */
1199__STATIC_INLINE uint16_t USBHS_HostGetMSOF(void)
1200{
1201        return ((USBHS->USBHS_HSTFNUM & USBHS_HSTFNUM_MFNUM_Msk) >>
1202                         USBHS_HSTFNUM_MFNUM_Pos);
1203}
1204
1205__STATIC_INLINE void USBHS_HostSetAddr(Usbhs *pUsbhs, uint8_t Pipe,
1206                                                                           uint8_t Addr)
1207{
1208        assert(Pipe < CHIP_USB_NUMPIPE);
1209
1210        if (Pipe < 4)
1211                pUsbhs->USBHS_HSTADDR1 |= (Addr << (8 * Pipe));
1212        else if ((Pipe < 8) && (Pipe >= 4))
1213                pUsbhs->USBHS_HSTADDR2 |= (Addr << (8 * (Pipe - 4)));
1214        else
1215                pUsbhs->USBHS_HSTADDR3 |= (Addr << (8 * (Pipe - 8)));
1216
1217}
1218
1219__STATIC_INLINE uint8_t USBHS_HostGetAddr(Usbhs *pUsbhs, uint8_t Pipe)
1220{
1221        assert(Pipe < CHIP_USB_NUMPIPE);
1222
1223        if (Pipe < 4)
1224                return (pUsbhs->USBHS_HSTADDR1 >>  (8 * Pipe));
1225        else if ((Pipe < 8) && (Pipe >= 4))
1226                return (pUsbhs->USBHS_HSTADDR2  >>  (8 * (Pipe - 4)));
1227        else
1228                return (pUsbhs->USBHS_HSTADDR3  >> (8 * (Pipe - 8)));
1229
1230}
1231
1232/**
1233 * \brief Gets USB host interrupt status
1234 * \param pUsbhs  USBHS host instance
1235 */
1236__STATIC_INLINE void USBHS_HostPipeEnable(Usbhs *pUsbhs, uint8_t Pipe)
1237{
1238        assert(Pipe < CHIP_USB_NUMPIPE);
1239        pUsbhs->USBHS_HSTPIP |= (USBHS_HSTPIP_PEN0 << Pipe);
1240}
1241
1242/**
1243 * \brief Gets USB host interrupt status
1244 * \param pUsbhs  USBHS host instance
1245 */
1246__STATIC_INLINE void USBHS_HostPipeDisable(Usbhs *pUsbhs, uint8_t Pipe)
1247{
1248        assert(Pipe < CHIP_USB_NUMPIPE);
1249        pUsbhs->USBHS_HSTPIP &= ~(USBHS_HSTPIP_PEN0 << Pipe);
1250}
1251
1252/**
1253 * \brief Gets USB host interrupt status
1254 * \param pUsbhs  USBHS host instance
1255 */
1256__STATIC_INLINE uint32_t USBHS_IsHostPipeEnable(Usbhs *pUsbhs, uint8_t Pipe)
1257{
1258        assert(Pipe < CHIP_USB_NUMPIPE);
1259        return (pUsbhs->USBHS_HSTPIP & (USBHS_HSTPIP_PEN0 << Pipe));
1260}
1261/**
1262 * \brief Gets USB host interrupt status
1263 * \param pUsbhs  USBHS host instance
1264 */
1265__STATIC_INLINE void USBHS_HostPipeReset(Usbhs *pUsbhs, uint8_t Pipe)
1266{
1267        assert(Pipe < CHIP_USB_NUMPIPE);
1268        pUsbhs->USBHS_HSTPIP |= (USBHS_HSTPIP_PRST0 << Pipe);
1269        pUsbhs->USBHS_HSTPIP &= ~(USBHS_HSTPIP_PRST0 << Pipe);
1270}
1271
1272/**
1273 * \brief Gets USB host interrupt status
1274 * \param pUsbhs  USBHS host instance
1275 */
1276__STATIC_INLINE void USBHS_HostConfigure(Usbhs *pUsbhs, uint8_t Pipe,
1277                uint32_t pipeBank, uint8_t pipeSize, uint32_t pipeType, uint32_t pipeToken,
1278                uint8_t pipeEpNum, uint8_t PipeIntFreq)
1279{
1280        assert(Pipe < CHIP_USB_NUMPIPE);
1281        pUsbhs->USBHS_HSTPIPCFG[Pipe] |= (pipeBank | pipeToken | USBHS_HSTPIPCFG_PSIZE(
1282                                                                                   pipeSize) | pipeType | USBHS_HSTPIPCFG_PEPNUM(pipeEpNum) |
1283                                                                           USBHS_HSTPIPCFG_INTFRQ(PipeIntFreq));
1284}
1285
1286/**
1287 * \brief Gets USB host interrupt status
1288 * \param pUsbhs  USBHS host instance
1289 */
1290__STATIC_INLINE void USBHS_HostAllocMem(Usbhs *pUsbhs, uint8_t Pipe)
1291{
1292        pUsbhs->USBHS_HSTPIPCFG[Pipe] |= USBHS_HSTPIPCFG_ALLOC;
1293
1294}
1295
1296/**
1297 * \brief Gets USB host interrupt status
1298 * \param pUsbhs  USBHS host instance
1299 */
1300__STATIC_INLINE void USBHS_HostFreeMem(Usbhs *pUsbhs, uint8_t Pipe)
1301{
1302        pUsbhs->USBHS_HSTPIPCFG[Pipe] &= ~USBHS_HSTPIPCFG_ALLOC;
1303
1304}
1305
1306
1307/**
1308 * \brief Gets USB host interrupt status
1309 * \param pUsbhs  USBHS host instance
1310 */
1311__STATIC_INLINE uint16_t USBHS_HostGetSize(Usbhs *pUsbhs, uint8_t Pipe)
1312{
1313        return (8 << ((pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PSIZE_Msk) >>
1314                                  USBHS_HSTPIPCFG_PSIZE_Pos));
1315
1316}
1317
1318/**
1319* \brief Gets USB host interrupt status
1320* \param pUsbhs  USBHS host instance
1321*/
1322__STATIC_INLINE void USBHS_HostSetToken(Usbhs *pUsbhs, uint8_t Pipe,
1323                                                                                uint32_t Token)
1324{
1325        pUsbhs->USBHS_HSTPIPCFG[Pipe] &= ~USBHS_HSTPIPCFG_PTOKEN_Msk;
1326        pUsbhs->USBHS_HSTPIPCFG[Pipe] |= Token;
1327
1328}
1329
1330
1331/**
1332 * \brief Gets USB host interrupt status
1333 * \param pUsbhs  USBHS host instance
1334 */
1335__STATIC_INLINE uint32_t USBHS_HostGetToken(Usbhs *pUsbhs, uint8_t Pipe)
1336{
1337        return (pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PTOKEN_Msk);
1338
1339}
1340
1341
1342/**
1343 * \brief Gets USB host interrupt status
1344 * \param pUsbhs  USBHS host instance
1345 */
1346__STATIC_INLINE void USBHS_HostSetPipeType(Usbhs *pUsbhs, uint8_t Pipe,
1347                uint8_t PipeType)
1348{
1349        pUsbhs->USBHS_HSTPIPCFG[Pipe] &= ~USBHS_HSTPIPCFG_PTYPE_Msk;
1350        pUsbhs->USBHS_HSTPIPCFG[Pipe] |= PipeType;
1351
1352}
1353
1354/**
1355 * \brief Gets USB host interrupt status
1356 * \param pUsbhs  USBHS host instance
1357 */
1358__STATIC_INLINE uint32_t USBHS_HostGetPipeType(Usbhs *pUsbhs, uint8_t Pipe)
1359{
1360        return (pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PTYPE_Msk);
1361
1362}
1363
1364__STATIC_INLINE uint8_t USBHS_GetPipeEpAddr(Usbhs *pUsbhs, uint8_t Pipe)
1365{
1366
1367        if (USBHS_HostGetToken(USBHS, Pipe) == USBHS_HSTPIPCFG_PTOKEN_IN)
1368                return (((pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PEPNUM_Msk) >>
1369                                  USBHS_HSTPIPCFG_PEPNUM_Pos) | 0x80);
1370        else
1371                return (((pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PEPNUM_Msk) >>
1372                                  USBHS_HSTPIPCFG_PEPNUM_Pos) | 0x00);
1373}
1374
1375
1376
1377/**
1378 * \brief Gets USB host interrupt status
1379 * \param pUsbhs  USBHS host instance
1380 */
1381__STATIC_INLINE void USBHS_HostEnableAutoSw(Usbhs *pUsbhs, uint8_t Pipe)
1382{
1383        pUsbhs->USBHS_HSTPIPCFG[Pipe] |= USBHS_HSTPIPCFG_AUTOSW;
1384}
1385
1386/**
1387 * \brief Gets USB host interrupt status
1388 * \param pUsbhs  USBHS host instance
1389 */
1390__STATIC_INLINE void USBHS_HostDisableAutoSw(Usbhs *pUsbhs, uint8_t Pipe)
1391{
1392        pUsbhs->USBHS_HSTPIPCFG[Pipe] &= ~USBHS_HSTPIPCFG_AUTOSW;
1393}
1394
1395/**
1396 * \brief Gets USB host interrupt status
1397 * \param pUsbhs  USBHS host instance
1398 */
1399__STATIC_INLINE void USBHS_HostSetIntFreq(Usbhs *pUsbhs, uint8_t Pipe,
1400                uint8_t Freq)
1401{
1402        pUsbhs->USBHS_HSTPIPCFG[Pipe] |= USBHS_HSTPIPCFG_BINTERVAL(Freq);
1403}
1404
1405
1406/**
1407 * \brief Gets USB host interrupt status
1408 * \param pUsbhs  USBHS host instance
1409 */
1410__STATIC_INLINE void USBHS_HostEnablePing(Usbhs *pUsbhs, uint8_t Pipe)
1411{
1412        pUsbhs->USBHS_HSTPIPCFG[Pipe] |= USBHS_HSTPIPCFG_PINGEN;
1413}
1414
1415
1416/**
1417 * \brief Gets USB host interrupt status
1418 * \param pUsbhs  USBHS host instance
1419 */
1420__STATIC_INLINE uint8_t USBHS_HostGetDataTogSeq(Usbhs *pUsbhs, uint8_t Pipe)
1421{
1422        return ((pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_HSTPIPISR_DTSEQ_Msk) >>
1423                         USBHS_HSTPIPISR_DTSEQ_Pos);
1424}
1425
1426
1427/**
1428 * \brief Gets USB host interrupt status
1429 * \param pUsbhs  USBHS host instance
1430 */
1431__STATIC_INLINE uint8_t USBHS_HostGetNumOfBusyBank(Usbhs *pUsbhs, uint8_t Pipe)
1432{
1433        return ((pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_HSTPIPISR_NBUSYBK_Msk) >>
1434                         USBHS_HSTPIPISR_NBUSYBK_Pos);
1435}
1436
1437
1438/**
1439 * \brief Gets USB host interrupt status
1440 * \param pUsbhs  USBHS host instance
1441 */
1442__STATIC_INLINE uint8_t USBHS_HostGetCurrentBank(Usbhs *pUsbhs, uint8_t Pipe)
1443{
1444        return ((pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_HSTPIPISR_CURRBK_Msk) >>
1445                         USBHS_HSTPIPISR_CURRBK_Pos);
1446}
1447
1448
1449/**
1450 * \brief Gets USB host interrupt status
1451 * \param pUsbhs  USBHS host instance
1452 */
1453__STATIC_INLINE uint8_t USBHS_HostGetPipeByteCount(Usbhs *pUsbhs, uint8_t Pipe)
1454{
1455        return ((pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_HSTPIPISR_PBYCT_Msk) >>
1456                         USBHS_HSTPIPISR_PBYCT_Pos);
1457}
1458
1459/**
1460 * \brief Gets USB host interrupt status
1461 * \param pUsbhs  USBHS host instance
1462 */
1463__STATIC_INLINE uint32_t USBHS_IsHostConfigOk(Usbhs *pUsbhs, uint8_t Pipe)
1464{
1465        return (pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_DEVEPTISR_CFGOK);
1466}
1467
1468/**
1469 * \brief Gets USB host interrupt status
1470 * \param pUsbhs  USBHS host instance
1471 */
1472__STATIC_INLINE uint32_t USBHS_HostGetIntTypeStatus(Usbhs *pUsbhs, uint8_t Pipe,
1473                uint32_t intType)
1474{
1475        return (pUsbhs->USBHS_HSTPIPISR[Pipe] & intType);
1476}
1477
1478/**
1479 * \brief Gets USB host interrupt status
1480 * \param pUsbhs  USBHS host instance
1481 */
1482__STATIC_INLINE void USBHS_HostAckPipeIntType(Usbhs *pUsbhs, uint8_t Pipe,
1483                uint32_t intType)
1484{
1485        pUsbhs->USBHS_HSTPIPICR[Pipe] = intType;
1486}
1487
1488/**
1489 * \brief Gets USB host interrupt status
1490 * \param pUsbhs  USBHS host instance
1491 */
1492__STATIC_INLINE void USBHS_HostSetPipeIntType(Usbhs *pUsbhs, uint8_t Pipe,
1493                uint32_t intType)
1494{
1495        pUsbhs->USBHS_HSTPIPIFR[Pipe] = intType;
1496}
1497
1498/**
1499 * \brief Gets USB host interrupt status
1500 * \param pUsbhs  USBHS host instance
1501 */
1502__STATIC_INLINE uint32_t USBHS_IsHostPipeIntTypeEnable(Usbhs *pUsbhs,
1503                uint8_t Pipe, uint32_t intType)
1504{
1505        return (pUsbhs->USBHS_HSTPIPIMR[Pipe] & intType);
1506}
1507
1508/**
1509 * \brief Gets USB host interrupt status
1510 * \param pUsbhs  USBHS host instance
1511 */
1512__STATIC_INLINE void USBHS_HostDisablePipeIntType(Usbhs *pUsbhs, uint8_t Pipe,
1513                uint32_t intType)
1514{
1515        pUsbhs->USBHS_HSTPIPIDR[Pipe] = intType;
1516}
1517
1518/**
1519 * \brief Gets USB host interrupt status
1520 * \param pUsbhs  USBHS host instance
1521 */
1522__STATIC_INLINE void USBHS_HostEnablePipeIntType(Usbhs *pUsbhs, uint8_t Pipe,
1523                uint32_t intType)
1524{
1525        pUsbhs->USBHS_HSTPIPIER[Pipe] = intType;
1526}
1527
1528/**
1529 * \brief Gets USB host interrupt status
1530 * \param pUsbhs  USBHS host instance
1531 */
1532__STATIC_INLINE void USBHS_HostEnableInReq(Usbhs *pUsbhs, uint8_t Pipe)
1533{
1534        pUsbhs->USBHS_HSTPIPINRQ[Pipe] |= USBHS_HSTPIPINRQ_INMODE;
1535}
1536
1537/**
1538 * \brief Gets USB host interrupt status
1539 * \param pUsbhs  USBHS host instance
1540 */
1541__STATIC_INLINE void USBHS_HostDisableInReq(Usbhs *pUsbhs, uint8_t Pipe)
1542{
1543        pUsbhs->USBHS_HSTPIPINRQ[Pipe] &= ~USBHS_HSTPIPINRQ_INMODE;
1544}
1545
1546/**
1547 * \brief Gets USB host interrupt status
1548 * \param pUsbhs  USBHS host instance
1549 */
1550__STATIC_INLINE uint8_t USBHS_IsHostInReqEnable(Usbhs *pUsbhs, uint8_t Pipe)
1551{
1552        return ((pUsbhs->USBHS_HSTPIPINRQ[Pipe] & USBHS_HSTPIPINRQ_INMODE) >> 8);
1553}
1554
1555/**
1556 * \brief Gets USB host interrupt status
1557 * \param pUsbhs  USBHS host instance
1558 */
1559__STATIC_INLINE void USBHS_HostInReq(Usbhs *pUsbhs, uint8_t Pipe, uint8_t InReq)
1560{
1561        pUsbhs->USBHS_HSTPIPINRQ[Pipe] = USBHS_HSTPIPINRQ_INRQ(InReq - 1);
1562}
1563
1564
1565/**
1566 * \brief Gets USB host interrupt status
1567 * \param pUsbhs  USBHS host instance
1568 */
1569__STATIC_INLINE void USBHS_HostSetErr(Usbhs *pUsbhs, uint8_t Pipe, uint8_t Err)
1570{
1571        pUsbhs->USBHS_HSTPIPERR[Pipe] |= Err;
1572}
1573
1574/**
1575 * \brief Gets USB host interrupt status
1576 * \param pUsbhs  USBHS host instance
1577 */
1578__STATIC_INLINE uint8_t USBHS_HostGetErr(Usbhs *pUsbhs, uint8_t Pipe,
1579                uint8_t Err)
1580{
1581        return (pUsbhs->USBHS_HSTPIPERR[Pipe] & Err);
1582}
1583
1584
1585/**
1586 * \brief Gets USB host interrupt status
1587 * \param pUsbhs  USBHS host instance
1588 */
1589__STATIC_INLINE void USBHS_HostClearErr(Usbhs *pUsbhs, uint8_t Pipe,
1590                                                                                uint8_t Err)
1591{
1592        pUsbhs->USBHS_HSTPIPERR[Pipe] = Err;
1593}
1594
1595
1596__STATIC_INLINE  uint8_t USBHS_GetInterruptPipeNum(void)
1597{
1598        uint32_t status = USBHS->USBHS_HSTISR;
1599        uint32_t mask = USBHS->USBHS_HSTIMR;
1600        return ctz(((status & mask) >> 8) | (1 << USBHS_EPT_NUM));
1601}
1602
1603static inline uint8_t USBHS_GetInterruptPipeDmaNum(void)
1604{
1605        uint32_t status = USBHS->USBHS_HSTISR;
1606        uint32_t mask = USBHS->USBHS_HSTIMR;
1607        return (ctz(((status & mask) >> 25) | (1 << (USBHS_EPT_NUM - 1))) + 1);
1608}
1609/*--------------------------------------------------------
1610* =========== USB Host's pipe DMA functions =========
1611*---------------------------------------------------------*/
1612
1613/**
1614* \brief Sets DMA next descriptor address
1615* \param pUsbDma  USBHS device DMA instance
1616* \param Desc NDA addrs
1617*/
1618__STATIC_INLINE void USBHS_SetHostDmaNDA(UsbhsHstdma *pUsbDma, uint32_t Desc)
1619{
1620        pUsbDma->USBHS_HSTDMANXTDSC = Desc;
1621}
1622
1623/**
1624* \brief Gets DMA next descriptor address
1625* \param pUsbDma  USBHS device DMA instance
1626* \return Next DMA descriptor
1627*/
1628__STATIC_INLINE uint32_t USBHS_GetHostDmaNDA(UsbhsHstdma *pUsbDma)
1629{
1630        return (pUsbDma->USBHS_HSTDMANXTDSC);
1631}
1632
1633/**
1634* \brief Sets USBHS's DMA Buffer addresse
1635* \param pUsbDma  USBHS device DMA instance
1636* \param Addr  DMA's buffer Addrs
1637*/
1638__STATIC_INLINE void USBHS_SetHostDmaBuffAdd(UsbhsHstdma *pUsbDma,
1639                uint32_t Addr)
1640{
1641        pUsbDma->USBHS_HSTDMAADDRESS = Addr;
1642}
1643
1644
1645/**
1646* \brief Gets USBHS's DMA Buffer addresse
1647* \param pUsbDma  USBHS device DMA instance
1648* \return DMA addrs
1649*/
1650__STATIC_INLINE uint32_t USBHS_GetHostDmaBuffAdd(UsbhsHstdma *pUsbDma)
1651{
1652        return (pUsbDma->USBHS_HSTDMAADDRESS);
1653}
1654
1655/**
1656* \brief Setup the USBHS DMA
1657* \param pUsbDma  USBHS device DMA instance
1658* \param Cfg  DMA's configuration
1659*/
1660__STATIC_INLINE void USBHS_HostConfigureDma(UsbhsHstdma *pUsbDma, uint32_t Cfg)
1661{
1662        pUsbDma->USBHS_HSTDMACONTROL |= Cfg;
1663}
1664
1665/**
1666* \brief Get DMA configuration
1667* \param pUsbDma  USBHS device DMA instance
1668* \return DMA control setup
1669*/
1670__STATIC_INLINE uint32_t USBHS_GetHostDmaConfiguration(UsbhsHstdma *pUsbDma)
1671{
1672        return (pUsbDma->USBHS_HSTDMACONTROL);
1673}
1674
1675
1676/**
1677* \brief Set DMA status
1678* \param pUsbDma  USBHS device DMA instance
1679* \Status Set DMA status
1680*/
1681__STATIC_INLINE void USBHS_SetHostPipeDmaStatus(UsbhsHstdma *pUsbDma,
1682                uint32_t Status)
1683{
1684        pUsbDma->USBHS_HSTDMASTATUS = Status;
1685}
1686
1687
1688/**
1689* \brief Get Dma Status
1690* \param pUsbDma  USBHS device DMA instance
1691* \return Dma status
1692*/
1693__STATIC_INLINE uint32_t USBHS_GetHostPipeDmaStatus(UsbhsHstdma *pUsbDma)
1694{
1695        return (pUsbDma->USBHS_HSTDMASTATUS);
1696}
1697
1698/**@}*/
1699#endif /* #ifndef USBHS_H */
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