1 | /* ---------------------------------------------------------------------------- */ |
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2 | /* Atmel Microcontroller Software Support */ |
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3 | /* SAM Software Package License */ |
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4 | /* ---------------------------------------------------------------------------- */ |
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5 | /* Copyright (c) 2015, Atmel Corporation */ |
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6 | /* */ |
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7 | /* All rights reserved. */ |
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8 | /* */ |
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9 | /* Redistribution and use in source and binary forms, with or without */ |
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10 | /* modification, are permitted provided that the following condition is met: */ |
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11 | /* */ |
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12 | /* - Redistributions of source code must retain the above copyright notice, */ |
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13 | /* this list of conditions and the disclaimer below. */ |
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14 | /* */ |
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15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
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16 | /* this software without specific prior written permission. */ |
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17 | /* */ |
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18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
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19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
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20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
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21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
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22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
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23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
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24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
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25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
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26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
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27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
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28 | /* ---------------------------------------------------------------------------- */ |
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29 | |
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30 | /** |
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31 | * \file |
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32 | * |
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33 | * Definitions and function prototype for SDRAMC. |
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34 | */ |
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35 | |
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36 | // --------------------------------------------------------------------------- |
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37 | // SDRAM |
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38 | // --------------------------------------------------------------------------- |
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39 | /** SDRAMC Configuration */ |
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40 | #define EBI_SDRAMC_ADDR (0x70000000u) |
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41 | |
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42 | /** SDRAM bus width */ |
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43 | #define BOARD_SDRAM_BUSWIDTH 16 |
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44 | |
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45 | |
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46 | typedef struct _SSdramc_config { |
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47 | uint32_t dwColumnBits; // Number of Column Bits |
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48 | uint32_t dwRowBits; // Number of Row Bits |
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49 | uint32_t dwBanks; // Number of Banks |
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50 | uint32_t dwCAS; // CAS Latency |
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51 | uint32_t dwDataBusWidth; // Data Bus Width |
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52 | uint32_t dwWriteRecoveryDelay; // Write Recovery Delay |
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53 | uint32_t dwRowCycleDelay_RowRefreshCycle; // Row Cycle Delay and Row Refresh Cycle |
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54 | uint32_t dwRowPrechargeDelay; // Row Precharge Delay |
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55 | uint32_t dwRowColumnDelay; // Row to Column Delay |
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56 | uint32_t dwActivePrechargeDelay; // Active to Precharge Delay |
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57 | uint32_t dwExitSelfRefreshActiveDelay; // Exit Self Refresh to Active Delay |
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58 | uint32_t dwBK1; // bk1 addr |
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59 | |
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60 | } SSdramc_config; |
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61 | |
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62 | typedef struct _SSdramc_Memory { |
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63 | SSdramc_config cfg; |
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64 | |
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65 | } SSdramc_Memory; |
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66 | |
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67 | extern void SDRAMC_Configure(SSdramc_Memory *pMemory, |
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68 | uint32_t dwClockFrequency); |
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