source: rtems/bsps/arm/atsam/include/libchip/include/same70/pio/pio_same70n21.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on 12/23/17 at 07:18:56

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.
  • Property mode set to 100644
File size: 35.6 KB
Line 
1/* ---------------------------------------------------------------------------- */
2/*                  Atmel Microcontroller Software Support                      */
3/*                       SAM Software Package License                           */
4/* ---------------------------------------------------------------------------- */
5/* Copyright (c) 2015, Atmel Corporation                                        */
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12/* - Redistributions of source code must retain the above copyright notice,     */
13/* this list of conditions and the disclaimer below.                            */
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15/* Atmel's name may not be used to endorse or promote products derived from     */
16/* this software without specific prior written permission.                     */
17/*                                                                              */
18/* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
19/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
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23/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */
24/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */
25/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */
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27/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
28/* ---------------------------------------------------------------------------- */
29
30#ifndef _SAME70N21_PIO_
31#define _SAME70N21_PIO_
32
33#define PIO_PA0                   (1u << 0)  /**< \brief Pin Controlled by PA0 */
34#define PIO_PA1                   (1u << 1)  /**< \brief Pin Controlled by PA1 */
35#define PIO_PA2                   (1u << 2)  /**< \brief Pin Controlled by PA2 */
36#define PIO_PA3                   (1u << 3)  /**< \brief Pin Controlled by PA3 */
37#define PIO_PA4                   (1u << 4)  /**< \brief Pin Controlled by PA4 */
38#define PIO_PA5                   (1u << 5)  /**< \brief Pin Controlled by PA5 */
39#define PIO_PA7                   (1u << 7)  /**< \brief Pin Controlled by PA7 */
40#define PIO_PA8                   (1u << 8)  /**< \brief Pin Controlled by PA8 */
41#define PIO_PA9                   (1u << 9)  /**< \brief Pin Controlled by PA9 */
42#define PIO_PA10                  (1u << 10) /**< \brief Pin Controlled by PA10 */
43#define PIO_PA11                  (1u << 11) /**< \brief Pin Controlled by PA11 */
44#define PIO_PA12                  (1u << 12) /**< \brief Pin Controlled by PA12 */
45#define PIO_PA13                  (1u << 13) /**< \brief Pin Controlled by PA13 */
46#define PIO_PA14                  (1u << 14) /**< \brief Pin Controlled by PA14 */
47#define PIO_PA15                  (1u << 15) /**< \brief Pin Controlled by PA15 */
48#define PIO_PA16                  (1u << 16) /**< \brief Pin Controlled by PA16 */
49#define PIO_PA17                  (1u << 17) /**< \brief Pin Controlled by PA17 */
50#define PIO_PA18                  (1u << 18) /**< \brief Pin Controlled by PA18 */
51#define PIO_PA19                  (1u << 19) /**< \brief Pin Controlled by PA19 */
52#define PIO_PA20                  (1u << 20) /**< \brief Pin Controlled by PA20 */
53#define PIO_PA21                  (1u << 21) /**< \brief Pin Controlled by PA21 */
54#define PIO_PA22                  (1u << 22) /**< \brief Pin Controlled by PA22 */
55#define PIO_PA23                  (1u << 23) /**< \brief Pin Controlled by PA23 */
56#define PIO_PA24                  (1u << 24) /**< \brief Pin Controlled by PA24 */
57#define PIO_PA25                  (1u << 25) /**< \brief Pin Controlled by PA25 */
58#define PIO_PA26                  (1u << 26) /**< \brief Pin Controlled by PA26 */
59#define PIO_PA27                  (1u << 27) /**< \brief Pin Controlled by PA27 */
60#define PIO_PA28                  (1u << 28) /**< \brief Pin Controlled by PA28 */
61#define PIO_PA30                  (1u << 30) /**< \brief Pin Controlled by PA30 */
62#define PIO_PA31                  (1u << 31) /**< \brief Pin Controlled by PA31 */
63#define PIO_PB0                   (1u << 0)  /**< \brief Pin Controlled by PB0 */
64#define PIO_PB1                   (1u << 1)  /**< \brief Pin Controlled by PB1 */
65#define PIO_PB2                   (1u << 2)  /**< \brief Pin Controlled by PB2 */
66#define PIO_PB3                   (1u << 3)  /**< \brief Pin Controlled by PB3 */
67#define PIO_PB4                   (1u << 4)  /**< \brief Pin Controlled by PB4 */
68#define PIO_PB5                   (1u << 5)  /**< \brief Pin Controlled by PB5 */
69#define PIO_PB6                   (1u << 6)  /**< \brief Pin Controlled by PB6 */
70#define PIO_PB7                   (1u << 7)  /**< \brief Pin Controlled by PB7 */
71#define PIO_PB8                   (1u << 8)  /**< \brief Pin Controlled by PB8 */
72#define PIO_PB9                   (1u << 9)  /**< \brief Pin Controlled by PB9 */
73#define PIO_PB12                  (1u << 12) /**< \brief Pin Controlled by PB12 */
74#define PIO_PB13                  (1u << 13) /**< \brief Pin Controlled by PB13 */
75#define PIO_PD0                   (1u << 0)  /**< \brief Pin Controlled by PD0 */
76#define PIO_PD1                   (1u << 1)  /**< \brief Pin Controlled by PD1 */
77#define PIO_PD2                   (1u << 2)  /**< \brief Pin Controlled by PD2 */
78#define PIO_PD3                   (1u << 3)  /**< \brief Pin Controlled by PD3 */
79#define PIO_PD4                   (1u << 4)  /**< \brief Pin Controlled by PD4 */
80#define PIO_PD5                   (1u << 5)  /**< \brief Pin Controlled by PD5 */
81#define PIO_PD6                   (1u << 6)  /**< \brief Pin Controlled by PD6 */
82#define PIO_PD7                   (1u << 7)  /**< \brief Pin Controlled by PD7 */
83#define PIO_PD8                   (1u << 8)  /**< \brief Pin Controlled by PD8 */
84#define PIO_PD9                   (1u << 9)  /**< \brief Pin Controlled by PD9 */
85#define PIO_PD10                  (1u << 10) /**< \brief Pin Controlled by PD10 */
86#define PIO_PD11                  (1u << 11) /**< \brief Pin Controlled by PD11 */
87#define PIO_PD12                  (1u << 12) /**< \brief Pin Controlled by PD12 */
88#define PIO_PD13                  (1u << 13) /**< \brief Pin Controlled by PD13 */
89#define PIO_PD14                  (1u << 14) /**< \brief Pin Controlled by PD14 */
90#define PIO_PD15                  (1u << 15) /**< \brief Pin Controlled by PD15 */
91#define PIO_PD16                  (1u << 16) /**< \brief Pin Controlled by PD16 */
92#define PIO_PD17                  (1u << 17) /**< \brief Pin Controlled by PD17 */
93#define PIO_PD18                  (1u << 18) /**< \brief Pin Controlled by PD18 */
94#define PIO_PD19                  (1u << 19) /**< \brief Pin Controlled by PD19 */
95#define PIO_PD20                  (1u << 20) /**< \brief Pin Controlled by PD20 */
96#define PIO_PD21                  (1u << 21) /**< \brief Pin Controlled by PD21 */
97#define PIO_PD22                  (1u << 22) /**< \brief Pin Controlled by PD22 */
98#define PIO_PD24                  (1u << 24) /**< \brief Pin Controlled by PD24 */
99#define PIO_PD25                  (1u << 25) /**< \brief Pin Controlled by PD25 */
100#define PIO_PD26                  (1u << 26) /**< \brief Pin Controlled by PD26 */
101#define PIO_PD27                  (1u << 27) /**< \brief Pin Controlled by PD27 */
102#define PIO_PD28                  (1u << 28) /**< \brief Pin Controlled by PD28 */
103#define PIO_PD30                  (1u << 30) /**< \brief Pin Controlled by PD30 */
104#define PIO_PD31                  (1u << 31) /**< \brief Pin Controlled by PD31 */
105/* ========== Pio definition for AFEC0 peripheral ========== */
106#define PIO_PD30X1_AFE0_AD0       (1u << 30) /**< \brief Afec0 signal: AFE0_AD0 */
107#define PIO_PA21X1_AFE0_AD1       (1u << 21) /**< \brief Afec0 signal: AFE0_AD1/PIODCEN2 */
108#define PIO_PA21X1_PIODCEN2       (1u << 21) /**< \brief Afec0 signal: AFE0_AD1/PIODCEN2 */
109#define PIO_PB0X1_AFE0_AD10       (1u << 0)  /**< \brief Afec0 signal: AFE0_AD10/RTCOUT0 */
110#define PIO_PB0X1_RTCOUT0         (1u << 0)  /**< \brief Afec0 signal: AFE0_AD10/RTCOUT0 */
111#define PIO_PB3X1_AFE0_AD2        (1u << 3)  /**< \brief Afec0 signal: AFE0_AD2/WKUP12 */
112#define PIO_PB3X1_WKUP12          (1u << 3)  /**< \brief Afec0 signal: AFE0_AD2/WKUP12 */
113#define PIO_PE5X1_AFE0_AD3        (1u << 5)  /**< \brief Afec0 signal: AFE0_AD3 */
114#define PIO_PE4X1_AFE0_AD4        (1u << 4)  /**< \brief Afec0 signal: AFE0_AD4 */
115#define PIO_PB2X1_AFE0_AD5        (1u << 2)  /**< \brief Afec0 signal: AFE0_AD5 */
116#define PIO_PA17X1_AFE0_AD6       (1u << 17) /**< \brief Afec0 signal: AFE0_AD6 */
117#define PIO_PA18X1_AFE0_AD7       (1u << 18) /**< \brief Afec0 signal: AFE0_AD7 */
118#define PIO_PA19X1_AFE0_AD8       (1u << 19) /**< \brief Afec0 signal: AFE0_AD8/WKUP9 */
119#define PIO_PA19X1_WKUP9          (1u << 19) /**< \brief Afec0 signal: AFE0_AD8/WKUP9 */
120#define PIO_PA20X1_AFE0_AD9       (1u << 20) /**< \brief Afec0 signal: AFE0_AD9/WKUP10 */
121#define PIO_PA20X1_WKUP10         (1u << 20) /**< \brief Afec0 signal: AFE0_AD9/WKUP10 */
122#define PIO_PA8B_AFE0_ADTRG       (1u << 8)  /**< \brief Afec0 signal: AFE0_ADTRG */
123/* ========== Pio definition for AFEC1 peripheral ========== */
124#define PIO_PB1X1_AFE1_AD0        (1u << 1)  /**< \brief Afec1 signal: AFE1_AD0/RTCOUT1 */
125#define PIO_PB1X1_RTCOUT1         (1u << 1)  /**< \brief Afec1 signal: AFE1_AD0/RTCOUT1 */
126#define PIO_PC13X1_AFE1_AD1       (1u << 13) /**< \brief Afec1 signal: AFE1_AD1 */
127#define PIO_PE3X1_AFE1_AD10       (1u << 3)  /**< \brief Afec1 signal: AFE1_AD10 */
128#define PIO_PE0X1_AFE1_AD11       (1u << 0)  /**< \brief Afec1 signal: AFE1_AD11 */
129#define PIO_PC15X1_AFE1_AD2       (1u << 15) /**< \brief Afec1 signal: AFE1_AD2 */
130#define PIO_PC12X1_AFE1_AD3       (1u << 12) /**< \brief Afec1 signal: AFE1_AD3 */
131#define PIO_PC29X1_AFE1_AD4       (1u << 29) /**< \brief Afec1 signal: AFE1_AD4 */
132#define PIO_PC30X1_AFE1_AD5       (1u << 30) /**< \brief Afec1 signal: AFE1_AD5 */
133#define PIO_PC31X1_AFE1_AD6       (1u << 31) /**< \brief Afec1 signal: AFE1_AD6 */
134#define PIO_PC26X1_AFE1_AD7       (1u << 26) /**< \brief Afec1 signal: AFE1_AD7 */
135#define PIO_PC27X1_AFE1_AD8       (1u << 27) /**< \brief Afec1 signal: AFE1_AD8 */
136#define PIO_PC0X1_AFE1_AD9        (1u << 0)  /**< \brief Afec1 signal: AFE1_AD9 */
137#define PIO_PD9C_AFE1_ADTRG       (1u << 9)  /**< \brief Afec1 signal: AFE1_ADTRG */
138/* ========== Pio definition for ARM peripheral ========== */
139#define PIO_PB7X1_SWCLK           (1u << 7)  /**< \brief Arm signal: SWCLK/TCK */
140#define PIO_PB7X1_TCK             (1u << 7)  /**< \brief Arm signal: SWCLK/TCK */
141#define PIO_PB6X1_SWDIO           (1u << 6)  /**< \brief Arm signal: SWDIO/TMS */
142#define PIO_PB6X1_TMS             (1u << 6)  /**< \brief Arm signal: SWDIO/TMS */
143#define PIO_PB4X1_TDI             (1u << 4)  /**< \brief Arm signal: TDI */
144#define PIO_PB5X1_TDO             (1u << 5)  /**< \brief Arm signal: TDO/TRACESWO/WKUP13 */
145#define PIO_PB5X1_TRACESWO        (1u << 5)  /**< \brief Arm signal: TDO/TRACESWO/WKUP13 */
146#define PIO_PB5X1_WKUP13          (1u << 5)  /**< \brief Arm signal: TDO/TRACESWO/WKUP13 */
147/* ========== Pio definition for DACC peripheral ========== */
148#define PIO_PB13X1_DAC0           (1u << 13) /**< \brief Dacc signal: DAC0 */
149#define PIO_PD0X1_DAC1            (1u << 0)  /**< \brief Dacc signal: DAC1 */
150#define PIO_PA2C_DATRG            (1u << 2)  /**< \brief Dacc signal: DATRG */
151/* ========== Pio definition for GMAC peripheral ========== */
152#define PIO_PD13A_GCOL            (1u << 13) /**< \brief Gmac signal: GCOL */
153#define PIO_PD10A_GCRS            (1u << 10) /**< \brief Gmac signal: GCRS */
154#define PIO_PD8A_GMDC             (1u << 8)  /**< \brief Gmac signal: GMDC */
155#define PIO_PD9A_GMDIO            (1u << 9)  /**< \brief Gmac signal: GMDIO */
156#define PIO_PD5A_GRX0             (1u << 5)  /**< \brief Gmac signal: GRX0 */
157#define PIO_PD6A_GRX1             (1u << 6)  /**< \brief Gmac signal: GRX1 */
158#define PIO_PD11A_GRX2            (1u << 11) /**< \brief Gmac signal: GRX2 */
159#define PIO_PD12A_GRX3            (1u << 12) /**< \brief Gmac signal: GRX3 */
160#define PIO_PD14A_GRXCK           (1u << 14) /**< \brief Gmac signal: GRXCK */
161#define PIO_PD4A_GRXDV            (1u << 4)  /**< \brief Gmac signal: GRXDV */
162#define PIO_PD7A_GRXER            (1u << 7)  /**< \brief Gmac signal: GRXER */
163#define PIO_PB1B_GTSUCOMP         (1u << 1)  /**< \brief Gmac signal: GTSUCOMP */
164#define PIO_PB12B_GTSUCOMP        (1u << 12) /**< \brief Gmac signal: GTSUCOMP */
165#define PIO_PD11C_GTSUCOMP        (1u << 11) /**< \brief Gmac signal: GTSUCOMP */
166#define PIO_PD20C_GTSUCOMP        (1u << 20) /**< \brief Gmac signal: GTSUCOMP */
167#define PIO_PD2A_GTX0             (1u << 2)  /**< \brief Gmac signal: GTX0 */
168#define PIO_PD3A_GTX1             (1u << 3)  /**< \brief Gmac signal: GTX1 */
169#define PIO_PD15A_GTX2            (1u << 15) /**< \brief Gmac signal: GTX2 */
170#define PIO_PD16A_GTX3            (1u << 16) /**< \brief Gmac signal: GTX3 */
171#define PIO_PD0A_GTXCK            (1u << 0)  /**< \brief Gmac signal: GTXCK */
172#define PIO_PD1A_GTXEN            (1u << 1)  /**< \brief Gmac signal: GTXEN */
173#define PIO_PD17A_GTXER           (1u << 17) /**< \brief Gmac signal: GTXER */
174/* ========== Pio definition for HSMCI peripheral ========== */
175#define PIO_PA28C_MCCDA           (1u << 28) /**< \brief Hsmci signal: MCCDA */
176#define PIO_PA25D_MCCK            (1u << 25) /**< \brief Hsmci signal: MCCK */
177#define PIO_PA30C_MCDA0           (1u << 30) /**< \brief Hsmci signal: MCDA0 */
178#define PIO_PA31C_MCDA1           (1u << 31) /**< \brief Hsmci signal: MCDA1 */
179#define PIO_PA26C_MCDA2           (1u << 26) /**< \brief Hsmci signal: MCDA2 */
180#define PIO_PA27C_MCDA3           (1u << 27) /**< \brief Hsmci signal: MCDA3 */
181/* ========== Pio definition for ISI peripheral ========== */
182#define PIO_PD22D_ISI_D0          (1u << 22) /**< \brief Isi signal: ISI_D0 */
183#define PIO_PD21D_ISI_D1          (1u << 21) /**< \brief Isi signal: ISI_D1 */
184#define PIO_PD30D_ISI_D10         (1u << 30) /**< \brief Isi signal: ISI_D10 */
185#define PIO_PD31D_ISI_D11         (1u << 31) /**< \brief Isi signal: ISI_D11 */
186#define PIO_PB3D_ISI_D2           (1u << 3)  /**< \brief Isi signal: ISI_D2 */
187#define PIO_PA9B_ISI_D3           (1u << 9)  /**< \brief Isi signal: ISI_D3 */
188#define PIO_PA5B_ISI_D4           (1u << 5)  /**< \brief Isi signal: ISI_D4 */
189#define PIO_PD11D_ISI_D5          (1u << 11) /**< \brief Isi signal: ISI_D5 */
190#define PIO_PD12D_ISI_D6          (1u << 12) /**< \brief Isi signal: ISI_D6 */
191#define PIO_PA27D_ISI_D7          (1u << 27) /**< \brief Isi signal: ISI_D7 */
192#define PIO_PD27D_ISI_D8          (1u << 27) /**< \brief Isi signal: ISI_D8 */
193#define PIO_PD28D_ISI_D9          (1u << 28) /**< \brief Isi signal: ISI_D9 */
194#define PIO_PD24D_ISI_HSYNC       (1u << 24) /**< \brief Isi signal: ISI_HSYNC */
195#define PIO_PA24D_ISI_PCK         (1u << 24) /**< \brief Isi signal: ISI_PCK */
196#define PIO_PD25D_ISI_VSYNC       (1u << 25) /**< \brief Isi signal: ISI_VSYNC */
197/* ========== Pio definition for MCAN0 peripheral ========== */
198#define PIO_PB3A_CANRX0           (1u << 3)  /**< \brief Mcan0 signal: CANRX0 */
199#define PIO_PB2A_CANTX0           (1u << 2)  /**< \brief Mcan0 signal: CANTX0 */
200/* ========== Pio definition for MCAN1 peripheral ========== */
201#define PIO_PC12C_CANRX1          (1u << 12) /**< \brief Mcan1 signal: CANRX1 */
202#define PIO_PD28B_CANRX1          (1u << 28) /**< \brief Mcan1 signal: CANRX1 */
203#define PIO_PC14C_CANTX1          (1u << 14) /**< \brief Mcan1 signal: CANTX1 */
204#define PIO_PD12B_CANTX1          (1u << 12) /**< \brief Mcan1 signal: CANTX1 */
205/* ========== Pio definition for PIOA peripheral ========== */
206#define PIO_PA21X1_AFE0_AD1       (1u << 21) /**< \brief Pioa signal: AFE0_AD1/PIODCEN2 */
207#define PIO_PA21X1_PIODCEN2       (1u << 21) /**< \brief Pioa signal: AFE0_AD1/PIODCEN2 */
208#define PIO_PA3X1_PIODC0          (1u << 3)  /**< \brief Pioa signal: PIODC0 */
209#define PIO_PA10X1_PIODC4         (1u << 10) /**< \brief Pioa signal: PIODC4 */
210#define PIO_PA12X1_PIODC6         (1u << 12) /**< \brief Pioa signal: PIODC6 */
211#define PIO_PA13X1_PIODC7         (1u << 13) /**< \brief Pioa signal: PIODC7 */
212#define PIO_PA22X1_PIODCCLK       (1u << 22) /**< \brief Pioa signal: PIODCCLK */
213#define PIO_PA4X1_WKUP3           (1u << 4)  /**< \brief Pioa signal: WKUP3/PIODC1 */
214#define PIO_PA4X1_PIODC1          (1u << 4)  /**< \brief Pioa signal: WKUP3/PIODC1 */
215#define PIO_PA5X1_WKUP4           (1u << 5)  /**< \brief Pioa signal: WKUP4/PIODC2 */
216#define PIO_PA5X1_PIODC2          (1u << 5)  /**< \brief Pioa signal: WKUP4/PIODC2 */
217#define PIO_PA9X1_WKUP6           (1u << 9)  /**< \brief Pioa signal: WKUP6/PIODC3 */
218#define PIO_PA9X1_PIODC3          (1u << 9)  /**< \brief Pioa signal: WKUP6/PIODC3 */
219#define PIO_PA11X1_WKUP7          (1u << 11) /**< \brief Pioa signal: WKUP7/PIODC5 */
220#define PIO_PA11X1_PIODC5         (1u << 11) /**< \brief Pioa signal: WKUP7/PIODC5 */
221#define PIO_PA14X1_WKUP8          (1u << 14) /**< \brief Pioa signal: WKUP8/PIODCEN1 */
222#define PIO_PA14X1_PIODCEN1       (1u << 14) /**< \brief Pioa signal: WKUP8/PIODCEN1 */
223/* ========== Pio definition for PMC peripheral ========== */
224#define PIO_PA6B_PCK0             (1u << 6)  /**< \brief Pmc signal: PCK0 */
225#define PIO_PB12D_PCK0            (1u << 12) /**< \brief Pmc signal: PCK0 */
226#define PIO_PB13B_PCK0            (1u << 13) /**< \brief Pmc signal: PCK0 */
227#define PIO_PA17B_PCK1            (1u << 17) /**< \brief Pmc signal: PCK1 */
228#define PIO_PA21B_PCK1            (1u << 21) /**< \brief Pmc signal: PCK1 */
229#define PIO_PA3C_PCK2             (1u << 3)  /**< \brief Pmc signal: PCK2 */
230#define PIO_PA18B_PCK2            (1u << 18) /**< \brief Pmc signal: PCK2 */
231#define PIO_PA31B_PCK2            (1u << 31) /**< \brief Pmc signal: PCK2 */
232#define PIO_PB3B_PCK2             (1u << 3)  /**< \brief Pmc signal: PCK2 */
233#define PIO_PD31C_PCK2            (1u << 31) /**< \brief Pmc signal: PCK2 */
234/* ========== Pio definition for PWM0 peripheral ========== */
235#define PIO_PA10B_PWMC0_PWMEXTRG0 (1u << 10) /**< \brief Pwm0 signal: PWMC0_PWMEXTRG0 */
236#define PIO_PA22B_PWMC0_PWMEXTRG1 (1u << 22) /**< \brief Pwm0 signal: PWMC0_PWMEXTRG1 */
237#define PIO_PA9C_PWMC0_PWMFI0     (1u << 9)  /**< \brief Pwm0 signal: PWMC0_PWMFI0 */
238#define PIO_PD8B_PWMC0_PWMFI1     (1u << 8)  /**< \brief Pwm0 signal: PWMC0_PWMFI1 */
239#define PIO_PD9B_PWMC0_PWMFI2     (1u << 9)  /**< \brief Pwm0 signal: PWMC0_PWMFI2 */
240#define PIO_PA0A_PWMC0_PWMH0      (1u << 0)  /**< \brief Pwm0 signal: PWMC0_PWMH0 */
241#define PIO_PA11B_PWMC0_PWMH0     (1u << 11) /**< \brief Pwm0 signal: PWMC0_PWMH0 */
242#define PIO_PA23B_PWMC0_PWMH0     (1u << 23) /**< \brief Pwm0 signal: PWMC0_PWMH0 */
243#define PIO_PB0A_PWMC0_PWMH0      (1u << 0)  /**< \brief Pwm0 signal: PWMC0_PWMH0 */
244#define PIO_PD11B_PWMC0_PWMH0     (1u << 11) /**< \brief Pwm0 signal: PWMC0_PWMH0 */
245#define PIO_PD20A_PWMC0_PWMH0     (1u << 20) /**< \brief Pwm0 signal: PWMC0_PWMH0 */
246#define PIO_PA2A_PWMC0_PWMH1      (1u << 2)  /**< \brief Pwm0 signal: PWMC0_PWMH1 */
247#define PIO_PA12B_PWMC0_PWMH1     (1u << 12) /**< \brief Pwm0 signal: PWMC0_PWMH1 */
248#define PIO_PA24B_PWMC0_PWMH1     (1u << 24) /**< \brief Pwm0 signal: PWMC0_PWMH1 */
249#define PIO_PB1A_PWMC0_PWMH1      (1u << 1)  /**< \brief Pwm0 signal: PWMC0_PWMH1 */
250#define PIO_PD21A_PWMC0_PWMH1     (1u << 21) /**< \brief Pwm0 signal: PWMC0_PWMH1 */
251#define PIO_PA13B_PWMC0_PWMH2     (1u << 13) /**< \brief Pwm0 signal: PWMC0_PWMH2 */
252#define PIO_PA25B_PWMC0_PWMH2     (1u << 25) /**< \brief Pwm0 signal: PWMC0_PWMH2 */
253#define PIO_PB4B_PWMC0_PWMH2      (1u << 4)  /**< \brief Pwm0 signal: PWMC0_PWMH2 */
254#define PIO_PC19B_PWMC0_PWMH2     (1u << 19) /**< \brief Pwm0 signal: PWMC0_PWMH2 */
255#define PIO_PD22A_PWMC0_PWMH2     (1u << 22) /**< \brief Pwm0 signal: PWMC0_PWMH2 */
256#define PIO_PA7B_PWMC0_PWMH3      (1u << 7)  /**< \brief Pwm0 signal: PWMC0_PWMH3 */
257#define PIO_PA14B_PWMC0_PWMH3     (1u << 14) /**< \brief Pwm0 signal: PWMC0_PWMH3 */
258#define PIO_PA17C_PWMC0_PWMH3     (1u << 17) /**< \brief Pwm0 signal: PWMC0_PWMH3 */
259#define PIO_PC13B_PWMC0_PWMH3     (1u << 13) /**< \brief Pwm0 signal: PWMC0_PWMH3 */
260#define PIO_PC21B_PWMC0_PWMH3     (1u << 21) /**< \brief Pwm0 signal: PWMC0_PWMH3 */
261#define PIO_PD23A_PWMC0_PWMH3     (1u << 23) /**< \brief Pwm0 signal: PWMC0_PWMH3 */
262#define PIO_PA1A_PWMC0_PWML0      (1u << 1)  /**< \brief Pwm0 signal: PWMC0_PWML0 */
263#define PIO_PA19B_PWMC0_PWML0     (1u << 19) /**< \brief Pwm0 signal: PWMC0_PWML0 */
264#define PIO_PB5B_PWMC0_PWML0      (1u << 5)  /**< \brief Pwm0 signal: PWMC0_PWML0 */
265#define PIO_PC0B_PWMC0_PWML0      (1u << 0)  /**< \brief Pwm0 signal: PWMC0_PWML0 */
266#define PIO_PD10B_PWMC0_PWML0     (1u << 10) /**< \brief Pwm0 signal: PWMC0_PWML0 */
267#define PIO_PD24A_PWMC0_PWML0     (1u << 24) /**< \brief Pwm0 signal: PWMC0_PWML0 */
268#define PIO_PA20B_PWMC0_PWML1     (1u << 20) /**< \brief Pwm0 signal: PWMC0_PWML1 */
269#define PIO_PB12A_PWMC0_PWML1     (1u << 12) /**< \brief Pwm0 signal: PWMC0_PWML1 */
270#define PIO_PC1B_PWMC0_PWML1      (1u << 1)  /**< \brief Pwm0 signal: PWMC0_PWML1 */
271#define PIO_PC18B_PWMC0_PWML1     (1u << 18) /**< \brief Pwm0 signal: PWMC0_PWML1 */
272#define PIO_PD25A_PWMC0_PWML1     (1u << 25) /**< \brief Pwm0 signal: PWMC0_PWML1 */
273#define PIO_PA16C_PWMC0_PWML2     (1u << 16) /**< \brief Pwm0 signal: PWMC0_PWML2 */
274#define PIO_PA30A_PWMC0_PWML2     (1u << 30) /**< \brief Pwm0 signal: PWMC0_PWML2 */
275#define PIO_PB13A_PWMC0_PWML2     (1u << 13) /**< \brief Pwm0 signal: PWMC0_PWML2 */
276#define PIO_PC2B_PWMC0_PWML2      (1u << 2)  /**< \brief Pwm0 signal: PWMC0_PWML2 */
277#define PIO_PC20B_PWMC0_PWML2     (1u << 20) /**< \brief Pwm0 signal: PWMC0_PWML2 */
278#define PIO_PD26A_PWMC0_PWML2     (1u << 26) /**< \brief Pwm0 signal: PWMC0_PWML2 */
279#define PIO_PA15C_PWMC0_PWML3     (1u << 15) /**< \brief Pwm0 signal: PWMC0_PWML3 */
280#define PIO_PC3B_PWMC0_PWML3      (1u << 3)  /**< \brief Pwm0 signal: PWMC0_PWML3 */
281#define PIO_PC15B_PWMC0_PWML3     (1u << 15) /**< \brief Pwm0 signal: PWMC0_PWML3 */
282#define PIO_PC22B_PWMC0_PWML3     (1u << 22) /**< \brief Pwm0 signal: PWMC0_PWML3 */
283#define PIO_PD27A_PWMC0_PWML3     (1u << 27) /**< \brief Pwm0 signal: PWMC0_PWML3 */
284/* ========== Pio definition for PWM1 peripheral ========== */
285#define PIO_PA30B_PWMC1_PWMEXTRG0 (1u << 30) /**< \brief Pwm1 signal: PWMC1_PWMEXTRG0 */
286#define PIO_PA18A_PWMC1_PWMEXTRG1 (1u << 18) /**< \brief Pwm1 signal: PWMC1_PWMEXTRG1 */
287#define PIO_PA21C_PWMC1_PWMFI0    (1u << 21) /**< \brief Pwm1 signal: PWMC1_PWMFI0 */
288#define PIO_PA26D_PWMC1_PWMFI1    (1u << 26) /**< \brief Pwm1 signal: PWMC1_PWMFI1 */
289#define PIO_PA28D_PWMC1_PWMFI2    (1u << 28) /**< \brief Pwm1 signal: PWMC1_PWMFI2 */
290#define PIO_PA12C_PWMC1_PWMH0     (1u << 12) /**< \brief Pwm1 signal: PWMC1_PWMH0 */
291#define PIO_PD1B_PWMC1_PWMH0      (1u << 1)  /**< \brief Pwm1 signal: PWMC1_PWMH0 */
292#define PIO_PA14C_PWMC1_PWMH1     (1u << 14) /**< \brief Pwm1 signal: PWMC1_PWMH1 */
293#define PIO_PD3B_PWMC1_PWMH1      (1u << 3)  /**< \brief Pwm1 signal: PWMC1_PWMH1 */
294#define PIO_PA31D_PWMC1_PWMH2     (1u << 31) /**< \brief Pwm1 signal: PWMC1_PWMH2 */
295#define PIO_PD5B_PWMC1_PWMH2      (1u << 5)  /**< \brief Pwm1 signal: PWMC1_PWMH2 */
296#define PIO_PA8A_PWMC1_PWMH3      (1u << 8)  /**< \brief Pwm1 signal: PWMC1_PWMH3 */
297#define PIO_PD7B_PWMC1_PWMH3      (1u << 7)  /**< \brief Pwm1 signal: PWMC1_PWMH3 */
298#define PIO_PA11C_PWMC1_PWML0     (1u << 11) /**< \brief Pwm1 signal: PWMC1_PWML0 */
299#define PIO_PD0B_PWMC1_PWML0      (1u << 0)  /**< \brief Pwm1 signal: PWMC1_PWML0 */
300#define PIO_PA13C_PWMC1_PWML1     (1u << 13) /**< \brief Pwm1 signal: PWMC1_PWML1 */
301#define PIO_PD2B_PWMC1_PWML1      (1u << 2)  /**< \brief Pwm1 signal: PWMC1_PWML1 */
302#define PIO_PA23D_PWMC1_PWML2     (1u << 23) /**< \brief Pwm1 signal: PWMC1_PWML2 */
303#define PIO_PD4B_PWMC1_PWML2      (1u << 4)  /**< \brief Pwm1 signal: PWMC1_PWML2 */
304#define PIO_PA5A_PWMC1_PWML3      (1u << 5)  /**< \brief Pwm1 signal: PWMC1_PWML3 */
305#define PIO_PD6B_PWMC1_PWML3      (1u << 6)  /**< \brief Pwm1 signal: PWMC1_PWML3 */
306/* ========== Pio definition for QSPI peripheral ========== */
307#define PIO_PA11A_QCS             (1u << 11) /**< \brief Qspi signal: QCS */
308#define PIO_PA13A_QIO0            (1u << 13) /**< \brief Qspi signal: QIO0 */
309#define PIO_PA12A_QIO1            (1u << 12) /**< \brief Qspi signal: QIO1 */
310#define PIO_PA17A_QIO2            (1u << 17) /**< \brief Qspi signal: QIO2 */
311#define PIO_PD31A_QIO3            (1u << 31) /**< \brief Qspi signal: QIO3 */
312#define PIO_PA14A_QSCK            (1u << 14) /**< \brief Qspi signal: QSCK */
313/* ========== Pio definition for SPI0 peripheral ========== */
314#define PIO_PD20B_SPI0_MISO       (1u << 20) /**< \brief Spi0 signal: SPI0_MISO */
315#define PIO_PD21B_SPI0_MOSI       (1u << 21) /**< \brief Spi0 signal: SPI0_MOSI */
316#define PIO_PB2D_SPI0_NPCS0       (1u << 2)  /**< \brief Spi0 signal: SPI0_NPCS0 */
317#define PIO_PA31A_SPI0_NPCS1      (1u << 31) /**< \brief Spi0 signal: SPI0_NPCS1 */
318#define PIO_PD25B_SPI0_NPCS1      (1u << 25) /**< \brief Spi0 signal: SPI0_NPCS1 */
319#define PIO_PD12C_SPI0_NPCS2      (1u << 12) /**< \brief Spi0 signal: SPI0_NPCS2 */
320#define PIO_PD27B_SPI0_NPCS3      (1u << 27) /**< \brief Spi0 signal: SPI0_NPCS3 */
321#define PIO_PD22B_SPI0_SPCK       (1u << 22) /**< \brief Spi0 signal: SPI0_SPCK */
322/* ========== Pio definition for SPI1 peripheral ========== */
323#define PIO_PC26C_SPI1_MISO       (1u << 26) /**< \brief Spi1 signal: SPI1_MISO */
324#define PIO_PC27C_SPI1_MOSI       (1u << 27) /**< \brief Spi1 signal: SPI1_MOSI */
325#define PIO_PC25C_SPI1_NPCS0      (1u << 25) /**< \brief Spi1 signal: SPI1_NPCS0 */
326#define PIO_PC28C_SPI1_NPCS1      (1u << 28) /**< \brief Spi1 signal: SPI1_NPCS1 */
327#define PIO_PD0C_SPI1_NPCS1       (1u << 0)  /**< \brief Spi1 signal: SPI1_NPCS1 */
328#define PIO_PC29C_SPI1_NPCS2      (1u << 29) /**< \brief Spi1 signal: SPI1_NPCS2 */
329#define PIO_PD1C_SPI1_NPCS2       (1u << 1)  /**< \brief Spi1 signal: SPI1_NPCS2 */
330#define PIO_PC30C_SPI1_NPCS3      (1u << 30) /**< \brief Spi1 signal: SPI1_NPCS3 */
331#define PIO_PD2C_SPI1_NPCS3       (1u << 2)  /**< \brief Spi1 signal: SPI1_NPCS3 */
332#define PIO_PC24C_SPI1_SPCK       (1u << 24) /**< \brief Spi1 signal: SPI1_SPCK */
333/* ========== Pio definition for SSC peripheral ========== */
334#define PIO_PA10C_RD              (1u << 10) /**< \brief Ssc signal: RD */
335#define PIO_PD24B_RF              (1u << 24) /**< \brief Ssc signal: RF */
336#define PIO_PA22A_RK              (1u << 22) /**< \brief Ssc signal: RK */
337#define PIO_PB5D_TD               (1u << 5)  /**< \brief Ssc signal: TD */
338#define PIO_PD10C_TD              (1u << 10) /**< \brief Ssc signal: TD */
339#define PIO_PD26B_TD              (1u << 26) /**< \brief Ssc signal: TD */
340#define PIO_PB0D_TF               (1u << 0)  /**< \brief Ssc signal: TF */
341#define PIO_PB1D_TK               (1u << 1)  /**< \brief Ssc signal: TK */
342/* ========== Pio definition for TC0 peripheral ========== */
343#define PIO_PA4B_TCLK0            (1u << 4)  /**< \brief Tc0 signal: TCLK0 */
344#define PIO_PA28B_TCLK1           (1u << 28) /**< \brief Tc0 signal: TCLK1 */
345#define PIO_PA29B_TCLK2           (1u << 29) /**< \brief Tc0 signal: TCLK2 */
346#define PIO_PA0B_TIOA0            (1u << 0)  /**< \brief Tc0 signal: TIOA0 */
347#define PIO_PA15B_TIOA1           (1u << 15) /**< \brief Tc0 signal: TIOA1 */
348#define PIO_PA26B_TIOA2           (1u << 26) /**< \brief Tc0 signal: TIOA2 */
349#define PIO_PA1B_TIOB0            (1u << 1)  /**< \brief Tc0 signal: TIOB0 */
350#define PIO_PA16B_TIOB1           (1u << 16) /**< \brief Tc0 signal: TIOB1 */
351#define PIO_PA27B_TIOB2           (1u << 27) /**< \brief Tc0 signal: TIOB2 */
352/* ========== Pio definition for TC3 peripheral ========== */
353#define PIO_PE5B_TCLK10           (1u << 5)  /**< \brief Tc3 signal: TCLK10 */
354#define PIO_PD24C_TCLK11          (1u << 24) /**< \brief Tc3 signal: TCLK11 */
355#define PIO_PE2B_TCLK9            (1u << 2)  /**< \brief Tc3 signal: TCLK9 */
356#define PIO_PE3B_TIOA10           (1u << 3)  /**< \brief Tc3 signal: TIOA10 */
357#define PIO_PD21C_TIOA11          (1u << 21) /**< \brief Tc3 signal: TIOA11 */
358#define PIO_PE0B_TIOA9            (1u << 0)  /**< \brief Tc3 signal: TIOA9 */
359#define PIO_PE4B_TIOB10           (1u << 4)  /**< \brief Tc3 signal: TIOB10 */
360#define PIO_PD22C_TIOB11          (1u << 22) /**< \brief Tc3 signal: TIOB11 */
361#define PIO_PE1B_TIOB9            (1u << 1)  /**< \brief Tc3 signal: TIOB9 */
362/* ========== Pio definition for TWIHS0 peripheral ========== */
363#define PIO_PA4A_TWCK0            (1u << 4)  /**< \brief Twihs0 signal: TWCK0 */
364#define PIO_PA3A_TWD0             (1u << 3)  /**< \brief Twihs0 signal: TWD0 */
365/* ========== Pio definition for TWIHS1 peripheral ========== */
366#define PIO_PB5A_TWCK1            (1u << 5)  /**< \brief Twihs1 signal: TWCK1 */
367#define PIO_PB4A_TWD1             (1u << 4)  /**< \brief Twihs1 signal: TWD1 */
368/* ========== Pio definition for TWIHS2 peripheral ========== */
369#define PIO_PD28C_TWCK2           (1u << 28) /**< \brief Twihs2 signal: TWCK2 */
370#define PIO_PD27C_TWD2            (1u << 27) /**< \brief Twihs2 signal: TWD2 */
371/* ========== Pio definition for UART0 peripheral ========== */
372#define PIO_PA9A_URXD0            (1u << 9)  /**< \brief Uart0 signal: URXD0 */
373#define PIO_PA10A_UTXD0           (1u << 10) /**< \brief Uart0 signal: UTXD0 */
374/* ========== Pio definition for UART1 peripheral ========== */
375#define PIO_PA5C_URXD1            (1u << 5)  /**< \brief Uart1 signal: URXD1 */
376#define PIO_PA4C_UTXD1            (1u << 4)  /**< \brief Uart1 signal: UTXD1 */
377#define PIO_PA6C_UTXD1            (1u << 6)  /**< \brief Uart1 signal: UTXD1 */
378#define PIO_PD26D_UTXD1           (1u << 26) /**< \brief Uart1 signal: UTXD1 */
379/* ========== Pio definition for UART2 peripheral ========== */
380#define PIO_PD25C_URXD2           (1u << 25) /**< \brief Uart2 signal: URXD2 */
381#define PIO_PD26C_UTXD2           (1u << 26) /**< \brief Uart2 signal: UTXD2 */
382/* ========== Pio definition for UART3 peripheral ========== */
383#define PIO_PD28A_URXD3           (1u << 28) /**< \brief Uart3 signal: URXD3 */
384#define PIO_PD30A_UTXD3           (1u << 30) /**< \brief Uart3 signal: UTXD3 */
385#define PIO_PD31B_UTXD3           (1u << 31) /**< \brief Uart3 signal: UTXD3 */
386/* ========== Pio definition for UART4 peripheral ========== */
387#define PIO_PD18C_URXD4           (1u << 18) /**< \brief Uart4 signal: URXD4 */
388#define PIO_PD3C_UTXD4            (1u << 3)  /**< \brief Uart4 signal: UTXD4 */
389#define PIO_PD19C_UTXD4           (1u << 19) /**< \brief Uart4 signal: UTXD4 */
390/* ========== Pio definition for USART0 peripheral ========== */
391#define PIO_PB2C_CTS0             (1u << 2)  /**< \brief Usart0 signal: CTS0 */
392#define PIO_PD0D_DCD0             (1u << 0)  /**< \brief Usart0 signal: DCD0 */
393#define PIO_PD2D_DSR0             (1u << 2)  /**< \brief Usart0 signal: DSR0 */
394#define PIO_PD1D_DTR0             (1u << 1)  /**< \brief Usart0 signal: DTR0 */
395#define PIO_PD3D_RI0              (1u << 3)  /**< \brief Usart0 signal: RI0 */
396#define PIO_PB3C_RTS0             (1u << 3)  /**< \brief Usart0 signal: RTS0 */
397#define PIO_PB0C_RXD0             (1u << 0)  /**< \brief Usart0 signal: RXD0 */
398#define PIO_PB13C_SCK0            (1u << 13) /**< \brief Usart0 signal: SCK0 */
399#define PIO_PB1C_TXD0             (1u << 1)  /**< \brief Usart0 signal: TXD0 */
400/* ========== Pio definition for USART1 peripheral ========== */
401#define PIO_PA25A_CTS1            (1u << 25) /**< \brief Usart1 signal: CTS1 */
402#define PIO_PA26A_DCD1            (1u << 26) /**< \brief Usart1 signal: DCD1 */
403#define PIO_PA28A_DSR1            (1u << 28) /**< \brief Usart1 signal: DSR1 */
404#define PIO_PA27A_DTR1            (1u << 27) /**< \brief Usart1 signal: DTR1 */
405#define PIO_PA3B_LONCOL1          (1u << 3)  /**< \brief Usart1 signal: LONCOL1 */
406#define PIO_PA29A_RI1             (1u << 29) /**< \brief Usart1 signal: RI1 */
407#define PIO_PA24A_RTS1            (1u << 24) /**< \brief Usart1 signal: RTS1 */
408#define PIO_PA21A_RXD1            (1u << 21) /**< \brief Usart1 signal: RXD1 */
409#define PIO_PA23A_SCK1            (1u << 23) /**< \brief Usart1 signal: SCK1 */
410#define PIO_PB4D_TXD1             (1u << 4)  /**< \brief Usart1 signal: TXD1 */
411/* ========== Pio definition for USART2 peripheral ========== */
412#define PIO_PD19B_CTS2            (1u << 19) /**< \brief Usart2 signal: CTS2 */
413#define PIO_PD4D_DCD2             (1u << 4)  /**< \brief Usart2 signal: DCD2 */
414#define PIO_PD6D_DSR2             (1u << 6)  /**< \brief Usart2 signal: DSR2 */
415#define PIO_PD5D_DTR2             (1u << 5)  /**< \brief Usart2 signal: DTR2 */
416#define PIO_PD7D_RI2              (1u << 7)  /**< \brief Usart2 signal: RI2 */
417#define PIO_PD18B_RTS2            (1u << 18) /**< \brief Usart2 signal: RTS2 */
418#define PIO_PD15B_RXD2            (1u << 15) /**< \brief Usart2 signal: RXD2 */
419#define PIO_PD17B_SCK2            (1u << 17) /**< \brief Usart2 signal: SCK2 */
420#define PIO_PD16B_TXD2            (1u << 16) /**< \brief Usart2 signal: TXD2 */
421/* ========== Pio indexes ========== */
422#define PIO_PA0_IDX               0
423#define PIO_PA1_IDX               1
424#define PIO_PA2_IDX               2
425#define PIO_PA3_IDX               3
426#define PIO_PA4_IDX               4
427#define PIO_PA5_IDX               5
428#define PIO_PA7_IDX               7
429#define PIO_PA8_IDX               8
430#define PIO_PA9_IDX               9
431#define PIO_PA10_IDX              10
432#define PIO_PA11_IDX              11
433#define PIO_PA12_IDX              12
434#define PIO_PA13_IDX              13
435#define PIO_PA14_IDX              14
436#define PIO_PA15_IDX              15
437#define PIO_PA16_IDX              16
438#define PIO_PA17_IDX              17
439#define PIO_PA18_IDX              18
440#define PIO_PA19_IDX              19
441#define PIO_PA20_IDX              20
442#define PIO_PA21_IDX              21
443#define PIO_PA22_IDX              22
444#define PIO_PA23_IDX              23
445#define PIO_PA24_IDX              24
446#define PIO_PA25_IDX              25
447#define PIO_PA26_IDX              26
448#define PIO_PA27_IDX              27
449#define PIO_PA28_IDX              28
450#define PIO_PA30_IDX              30
451#define PIO_PA31_IDX              31
452#define PIO_PB0_IDX               32
453#define PIO_PB1_IDX               33
454#define PIO_PB2_IDX               34
455#define PIO_PB3_IDX               35
456#define PIO_PB4_IDX               36
457#define PIO_PB5_IDX               37
458#define PIO_PB6_IDX               38
459#define PIO_PB7_IDX               39
460#define PIO_PB8_IDX               40
461#define PIO_PB9_IDX               41
462#define PIO_PB12_IDX              44
463#define PIO_PB13_IDX              45
464#define PIO_PD0_IDX               96
465#define PIO_PD1_IDX               97
466#define PIO_PD2_IDX               98
467#define PIO_PD3_IDX               99
468#define PIO_PD4_IDX               100
469#define PIO_PD5_IDX               101
470#define PIO_PD6_IDX               102
471#define PIO_PD7_IDX               103
472#define PIO_PD8_IDX               104
473#define PIO_PD9_IDX               105
474#define PIO_PD10_IDX              106
475#define PIO_PD11_IDX              107
476#define PIO_PD12_IDX              108
477#define PIO_PD13_IDX              109
478#define PIO_PD14_IDX              110
479#define PIO_PD15_IDX              111
480#define PIO_PD16_IDX              112
481#define PIO_PD17_IDX              113
482#define PIO_PD18_IDX              114
483#define PIO_PD19_IDX              115
484#define PIO_PD20_IDX              116
485#define PIO_PD21_IDX              117
486#define PIO_PD22_IDX              118
487#define PIO_PD24_IDX              120
488#define PIO_PD25_IDX              121
489#define PIO_PD26_IDX              122
490#define PIO_PD27_IDX              123
491#define PIO_PD28_IDX              124
492#define PIO_PD30_IDX              126
493#define PIO_PD31_IDX              127
494
495#endif /* _SAME70N21_PIO_ */
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