source: rtems/bsps/arm/atsam/include/libchip/include/pio.h @ 71c5552f

Last change on this file since 71c5552f was 71c5552f, checked in by Christian Mauderer <christian.mauderer@…>, on Mar 12, 2018 at 3:43:28 PM

bsp/atsam: Allow setting the drive strength.

This adds a simple function for setting the PIO drive strength.

  • Property mode set to 100644
File size: 7.8 KB
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1/* ---------------------------------------------------------------------------- */
2/*                  Atmel Microcontroller Software Support                      */
3/*                       SAM Software Package License                           */
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28/* ---------------------------------------------------------------------------- */
29
30/**
31 *  \file
32 *
33 *  \section Purpose
34 *
35 *  This file provides a basic API for PIO configuration and usage of
36 *  user-controlled pins. Please refer to the board.h file for a list of
37 *  available pin definitions.
38 *
39 *  \section Usage
40 *
41 *  -# Define a constant pin description array such as the following one, using
42 *     the existing definitions provided by the board.h file if possible:
43 *     \code
44 *        const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD};
45 *     \endcode
46 *     Alternatively, it is possible to add new pins by provided the full Pin
47 *     structure:
48 *     \code
49 *     // Pin instance to configure PA10 & PA11 as inputs with the internal
50 *     // pull-up enabled.
51 *     const Pin pPins = {
52 *          (1 << 10) | (1 << 11),
53 *          REG_PIOA,
54 *          ID_PIOA,
55 *          PIO_INPUT,
56 *          PIO_PULLUP
57 *     };
58 *     \endcode
59 *  -# Configure a pin array by calling PIO_Configure() with a pointer to the
60 *     array and its size (which is computed using the PIO_LISTSIZE macro).
61 *  -# Change and get the value of a user-controlled pin using the PIO_Set,
62 *     PIO_Clear and PIO_Get methods.
63 *  -# Get the level being currently output by a user-controlled pin configured
64 *     as an output using PIO_GetOutputDataStatus().
65 */
66
67#ifndef _PIO_
68#define _PIO_
69
70/*
71 *         Headers
72 */
73
74#include "chip.h"
75
76#include <stdint.h>
77
78/*
79 *         Global Definitions
80 */
81
82/**  The pin is controlled by the associated signal of peripheral A. */
83#define PIO_PERIPH_A                0
84/**  The pin is controlled by the associated signal of peripheral B. */
85#define PIO_PERIPH_B                1
86/**  The pin is controlled by the associated signal of peripheral C. */
87#define PIO_PERIPH_C                2
88/**  The pin is controlled by the associated signal of peripheral D. */
89#define PIO_PERIPH_D                3
90/**  The pin is an input. */
91#define PIO_INPUT                   4
92/**  The pin is an output and has a default level of 0. */
93#define PIO_OUTPUT_0                5
94/**  The pin is an output and has a default level of 1. */
95#define PIO_OUTPUT_1                6
96
97/**  Default pin configuration (no attribute). */
98#define PIO_DEFAULT                 (0 << 0)
99/**  The internal pin pull-up is active. */
100#define PIO_PULLUP                  (1 << 0)
101/**  The internal glitch filter is active. */
102#define PIO_DEGLITCH                (1 << 1)
103/**  The pin is open-drain. */
104#define PIO_OPENDRAIN               (1 << 2)
105
106/**  The internal debouncing filter is active. */
107#define PIO_DEBOUNCE                (1 << 3)
108
109/**  Enable additional interrupt modes. */
110#define PIO_IT_AIME                 (1 << 4)
111
112/**  Interrupt High Level/Rising Edge detection is active. */
113#define PIO_IT_RE_OR_HL             (1 << 5)
114/**  Interrupt Edge detection is active. */
115#define PIO_IT_EDGE                 (1 << 6)
116
117/**  Low level interrupt is active */
118#define PIO_IT_LOW_LEVEL          (0               | 0 | PIO_IT_AIME)
119/**  High level interrupt is active */
120#define PIO_IT_HIGH_LEVEL         (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME)
121/**  Falling edge interrupt is active */
122#define PIO_IT_FALL_EDGE          (0               | PIO_IT_EDGE | PIO_IT_AIME)
123/**  Rising edge interrupt is active */
124#define PIO_IT_RISE_EDGE          (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME)
125/** The WP is enable */
126#define PIO_WPMR_WPEN_EN          (0x01     << 0)
127/** The WP is disable */
128#define PIO_WPMR_WPEN_DIS         (0x00     << 0)
129/** Valid WP key */
130#define PIO_WPMR_WPKEY_VALID      (0x50494F << 8)
131#ifdef __cplusplus
132extern "C" {
133#endif
134
135/*
136 *          Global Macros
137 */
138
139/**
140 *  Calculates the size of an array of Pin instances. The array must be defined
141 *  locally (i.e. not a pointer), otherwise the computation will not be correct.
142 *  \param pPins  Local array of Pin instances.
143 *  \return Number of elements in array.
144 */
145#define PIO_LISTSIZE(pPins)    (sizeof(pPins) / sizeof(Pin))
146
147/*
148 *         Global Types
149 */
150
151
152/*
153 *  Describes the type and attribute of one PIO pin or a group of similar pins.
154 *  The #type# field can have the following values:
155 *     - PIO_PERIPH_A
156 *     - PIO_PERIPH_B
157 *     - PIO_OUTPUT_0
158 *     - PIO_OUTPUT_1
159 *     - PIO_INPUT
160 *
161 *  The #attribute# field is a bitmask that can either be set to PIO_DEFAULt,
162 *  or combine (using bitwise OR '|') any number of the following constants:
163 *     - PIO_PULLUP
164 *     - PIO_DEGLITCH
165 *     - PIO_DEBOUNCE
166 *     - PIO_OPENDRAIN
167 *     - PIO_IT_LOW_LEVEL
168 *     - PIO_IT_HIGH_LEVEL
169 *     - PIO_IT_FALL_EDGE
170 *     - PIO_IT_RISE_EDGE
171 */
172typedef struct _Pin {
173        /*  Bitmask indicating which pin(s) to configure. */
174        uint32_t mask;
175        /*  Pointer to the PIO controller which has the pin(s). */
176        Pio    *pio;
177        /*  Peripheral ID of the PIO controller which has the pin(s). */
178        uint8_t id;
179        /*  Pin type. */
180        uint8_t type;
181        /*  Pin attribute. */
182        uint8_t attribute;
183} Pin;
184
185/*
186 *         Global Access Macros
187 */
188
189/*
190 *         Global Functions
191 */
192
193extern uint8_t PIO_Configure(const Pin *list, uint32_t size);
194
195extern void PIO_Set(const Pin *pin);
196
197extern void PIO_Clear(const Pin *pin);
198
199extern uint8_t PIO_Get(const Pin *pin);
200
201extern uint8_t PIO_GetOutputDataStatus(const Pin *pin);
202
203extern void PIO_SetDebounceFilter(const Pin *pin, uint32_t cuttoff);
204
205extern void PIO_EnableWriteProtect(const Pin *pin);
206
207extern void PIO_DisableWriteProtect(const Pin *pin);
208
209extern void PIO_SetPinType(Pin *pin, uint8_t pinType);
210
211extern uint32_t PIO_GetWriteProtectViolationInfo(const Pin *pin);
212
213extern void PIO_SetDriveStrength(const Pin *pin, uint8_t strength);
214#ifdef __cplusplus
215}
216#endif
217
218#endif /* #ifndef _PIO_ */
219
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