1 | /* ---------------------------------------------------------------------------- */ |
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2 | /* Atmel Microcontroller Software Support */ |
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3 | /* SAM Software Package License */ |
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4 | /* ---------------------------------------------------------------------------- */ |
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5 | /* Copyright (c) 2015, Atmel Corporation */ |
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6 | /* */ |
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7 | /* All rights reserved. */ |
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8 | /* */ |
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9 | /* Redistribution and use in source and binary forms, with or without */ |
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10 | /* modification, are permitted provided that the following condition is met: */ |
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11 | /* */ |
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12 | /* - Redistributions of source code must retain the above copyright notice, */ |
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13 | /* this list of conditions and the disclaimer below. */ |
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14 | /* */ |
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15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
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16 | /* this software without specific prior written permission. */ |
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17 | /* */ |
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18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
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19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
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20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
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21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
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22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
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23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
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24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
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25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
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26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
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27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
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28 | /* ---------------------------------------------------------------------------- */ |
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29 | |
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30 | #ifndef _ICM_ |
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31 | #define _ICM_ |
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32 | |
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33 | /*------------------------------------------------------------------------------ |
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34 | * Headers |
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35 | *------------------------------------------------------------------------------*/ |
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36 | |
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37 | #include "chip.h" |
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38 | |
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39 | |
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40 | /*------------------------------------------------------------------------------*/ |
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41 | /* Definition */ |
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42 | /*------------------------------------------------------------------------------*/ |
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43 | #define ICM_RCFG_CDWBN (0x1u << 0) |
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44 | /**< \brief (ICM_RCFG) Compare Digest or Write Back Digest */ |
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45 | #define ICM_RCFG_WRAP (0x1u << 1) |
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46 | /**< \brief (ICM_RCFG) Wrap Command */ |
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47 | #define ICM_RCFG_EOM (0x1u << 2) |
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48 | /**< \brief (ICM_RCFG) End Of Monitoring */ |
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49 | #define ICM_RCFG_RHIEN (0x1u << 4) |
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50 | /**< \brief (ICM_RCFG) Region Hash Completed interrupt enable */ |
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51 | #define ICM_RCFG_DMIEN (0x1u << 5) |
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52 | /**< \brief (ICM_RCFG) Digest Mismatch interrupt enable */ |
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53 | #define ICM_RCFG_BEIEN (0x1u << 6) |
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54 | /**< \brief (ICM_RCFG) Bus error interrupt enable */ |
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55 | #define ICM_RCFG_WCIEN (0x1u << 7) |
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56 | /**< \brief (ICM_RCFG) Warp condition interrupt enable */ |
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57 | #define ICM_RCFG_ECIEN (0x1u << 8) |
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58 | /**< \brief (ICM_RCFG) End bit condition interrupt enable */ |
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59 | #define ICM_RCFG_SUIEN (0x1u << 9) |
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60 | /**< \brief (ICM_RCFG) Monitoring Status Updated Condition Interrupt Enable */ |
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61 | #define ICM_RCFG_PROCDLY (0x1u << 10) |
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62 | /**< \brief (ICM_RCFG) Processing Delay*/ |
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63 | #define ICM_RCFG_UALGO_Pos 12 |
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64 | #define ICM_RCFG_UALGO_Msk (0x7u << ICM_RCFG_UALGO_Pos) |
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65 | /**< \brief (ICM_RCFG) User SHA Algorithm */ |
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66 | #define ICM_RCFG_ALGO_SHA1 (0x0u << 12) |
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67 | /**< \brief (ICM_RCFG) SHA1 algorithm processed */ |
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68 | #define ICM_RCFG_ALGO_SHA256 (0x1u << 12) |
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69 | /**< \brief (ICM_RCFG) SHA256 algorithm processed */ |
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70 | #define ICM_RCFG_ALGO_SHA224 (0x4u << 12) |
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71 | /**< \brief (ICM_RCFG) SHA224 algorithm processed */ |
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72 | #define ICM_RCFG_MRPROT_Pos 24 |
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73 | #define ICM_RCFG_MRPROT_Msk (0x3fu << ICM_RCFG_MRPROT_Pos) |
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74 | /**< \brief (ICM_RCFG) Memory Region AHB Protection */ |
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75 | #define ICM_RCFG_MRPROT(value) \ |
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76 | ((ICM_RCFG_MRPROT_Msk & ((value) << ICM_RCFG_MRPROT_Pos))) |
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77 | |
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78 | /*----------------------------------------------------------------------------*/ |
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79 | /* Type */ |
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80 | /*----------------------------------------------------------------------------*/ |
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81 | |
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82 | /** \brief Structure ICM region descriptor area. */ |
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83 | typedef struct _LinkedListDescriporIcmRegion { |
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84 | /** the first byte address of the Region. */ |
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85 | uint32_t icm_raddr; |
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86 | /** Configuration Structure Member. */ |
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87 | uint32_t icm_rcfg; |
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88 | /** Control Structure Member. */ |
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89 | uint32_t icm_rctrl; |
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90 | /** Next Address Structure Member. */ |
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91 | uint32_t icm_rnext; |
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92 | } LinkedListDescriporIcmRegion; |
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93 | |
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94 | /*----------------------------------------------------------------------------*/ |
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95 | /* Exported functions */ |
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96 | /*----------------------------------------------------------------------------*/ |
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97 | extern void ICM_Enable(void); |
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98 | extern void ICM_Disable(void); |
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99 | extern void ICM_SoftReset(void); |
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100 | extern void ICM_ReComputeHash(uint8_t region); |
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101 | extern void ICM_EnableMonitor(uint8_t region); |
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102 | extern void ICM_DisableMonitor(uint8_t region); |
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103 | extern void ICM_Configure(uint32_t mode); |
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104 | extern void ICM_EnableIt(uint32_t sources); |
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105 | extern void ICM_DisableIt(uint32_t sources); |
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106 | extern uint32_t ICM_GetIntStatus(void); |
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107 | extern uint32_t ICM_GetStatus(void); |
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108 | extern uint32_t ICM_GetUStatus(void); |
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109 | extern void ICM_SetDescStartAddress(uint32_t addr); |
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110 | extern void ICM_SetHashStartAddress(uint32_t addr); |
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111 | extern void ICM_SetInitHashValue(uint32_t val); |
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112 | #endif /* #ifndef _ICM_ */ |
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