source: rtems/bsps/arm/atsam/include/libchip/include/afec.h @ 71c5552f

Last change on this file since 71c5552f was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 8.6 KB
Line 
1/* ---------------------------------------------------------------------------- */
2/*                  Atmel Microcontroller Software Support                      */
3/*                       SAM Software Package License                           */
4/* ---------------------------------------------------------------------------- */
5/* Copyright (c) 2015, Atmel Corporation                                        */
6/*                                                                              */
7/* All rights reserved.                                                         */
8/*                                                                              */
9/* Redistribution and use in source and binary forms, with or without           */
10/* modification, are permitted provided that the following condition is met:    */
11/*                                                                              */
12/* - Redistributions of source code must retain the above copyright notice,     */
13/* this list of conditions and the disclaimer below.                            */
14/*                                                                              */
15/* Atmel's name may not be used to endorse or promote products derived from     */
16/* this software without specific prior written permission.                     */
17/*                                                                              */
18/* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
19/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
20/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */
21/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,      */
22/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
23/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */
24/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */
25/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */
26/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
27/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
28/* ---------------------------------------------------------------------------- */
29
30/**
31 *  \file
32 *
33 *  \section Purpose
34 *
35 *  Interface for configuration the Analog-to-Digital Converter (AFEC) peripheral.
36 *
37 *  \section Usage
38 *
39 *  -# Configurate the pins for AFEC.
40 *  -# Initialize the AFEC with AFEC_Initialize().
41 *  -# Set AFEC clock and timing with AFEC_SetClock() and AFEC_SetTiming().
42 *  -# Select the active channel using AFEC_EnableChannel().
43 *  -# Start the conversion with AFEC_StartConversion().
44 *  -# Wait the end of the conversion by polling status with AFEC_GetStatus().
45 *  -# Finally, get the converted data using AFEC_GetConvertedData() or
46 * AFEC_GetLastConvertedData().
47 *
48*/
49#ifndef _AFEC_
50#define _AFEC_
51
52/*----------------------------------------------------------------------------
53 *        Headers
54 *----------------------------------------------------------------------------*/
55#include <assert.h>
56#include <stdint.h>
57
58/*------------------------------------------------------------------------------
59 *         Definitions
60 *------------------------------------------------------------------------------*/
61
62/* -------- AFEC_MR : (AFEC Offset: 0x04) AFEC Mode Register -------- */
63#define AFEC_MR_SETTLING_Pos 20
64#define AFEC_MR_SETTLING_Msk (0x3u << AFEC_MR_SETTLING_Pos)
65/**< \brief (AFEC_MR) Trigger Selection */
66#define   AFEC_MR_SETTLING_AST3 (0x0u << 20)
67/**< \brief (AFEC_MR) ADC_SETTLING_AST3 3 periods of AFEClock */
68#define   AFEC_MR_SETTLING_AST5 (0x1u << 20)
69/**< \brief (AFEC_MR) ADC_SETTLING_AST5 5 periods of AFEClock */
70#define   AFEC_MR_SETTLING_AST9 (0x2u << 20)
71/**< \brief (AFEC_MR) ADC_SETTLING_AST9 9 periods of AFEClock*/
72#define   AFEC_MR_SETTLING_AST17 (0x3u << 20)
73/**< \brief (AFEC_MR) ADC_SETTLING_AST17  17 periods of AFEClock*/
74
75/***************************** Single Trigger Mode ****************************/
76#define AFEC_EMR_STM_Pos 25
77#define AFEC_EMR_STM_Msk (0x1u << AFEC_EMR_STM_Pos)
78/**< \brief (AFEC_EMR) Single Trigger Mode */
79#define   AFEC_EMR_STM_MULTI_TRIG (0x0u << 25)
80/**< \brief (AFEC_EMR) Single Trigger Mode: Multiple triggers are required to
81    get an averaged result. */
82#define   AFEC_EMR_STM_SINGLE_TRIG (0x1u << 25)
83/**< \brief (AFEC_EMR) Single Trigger Mode: Only a Single Trigger is required
84    to get an averaged value. */
85
86/***************************** TAG of the AFEC_LDCR Register ******************/
87#define AFEC_EMR_TAG_Pos 24
88#define AFEC_EMR_TAG_Msk (0x1u << AFEC_EMR_TAG_Pos)
89/**< \brief (AFEC_EMR) TAG of the AFEC_LDCR Register */
90#define   AFEC_EMR_TAG_CHNB_ZERO (0x0u << 24)
91/**< \brief (AFEC_EMR) TAG of the AFEC_LDCR Register: Sets CHNB to zero
92in AFEC_LDCR. */
93#define   AFEC_EMR_TAG_APPENDS (0x1u << 24)
94/**< \brief (AFEC_EMR) TAG of the AFEC_LDCR Register: Appends the channel
95number to the conversion result in AFEC_LDCR register. */
96
97/***************************** Compare All Channels ******************/
98#define AFEC_EMR_CMPALL_Pos 9
99#define AFEC_EMR_CMPALL_Msk (0x1u << AFEC_EMR_TAG_Pos)
100/**< \brief (AFEC_EMR) Compare All Channels */
101#define   AFEC_EMR_CMPALL_ONE_CHANNEL_COMP (0x0u << 9)
102/**< \brief (AFEC_EMR) Compare All Channels: Only channel indicated in
103CMPSEL field is compared. */
104#define   AFEC_EMR_CMPALL_ALL_CHANNELS_COMP  (0x1u << 9)
105/**< \brief (AFEC_EMR) Compare All Channels: All channels are compared. */
106
107#define AFEC_ACR_PGA0_ON     (0x1u << 2)
108#define AFEC_ACR_PGA1_ON     (0x1u << 3)
109
110#ifdef __cplusplus
111extern "C" {
112#endif
113
114/*------------------------------------------------------------------------------
115 *         Macros function of register access
116 *------------------------------------------------------------------------------*/
117
118#define AFEC_GetModeReg(pAFEC)                ((pAFEC)->AFEC_MR)
119#define AFEC_SetModeReg(pAFEC, mode)          ((pAFEC)->AFEC_MR = mode)
120
121#define AFEC_GetExtModeReg(pAFEC)             ((pAFEC)->AFEC_EMR)
122#define AFEC_SetExtModeReg(pAFEC, mode)       ((pAFEC)->AFEC_EMR = mode)
123
124#define AFEC_StartConversion(pAFEC)           ((pAFEC)->AFEC_CR = AFEC_CR_START)
125
126#define AFEC_EnableChannel(pAFEC, dwChannel)    {\
127                (pAFEC)->AFEC_CHER = (1 << (dwChannel));\
128        }
129
130#define AFEC_DisableChannel(pAFEC, dwChannel)  {\
131                (pAFEC)->AFEC_CHDR = (1 << (dwChannel));\
132        }
133
134#define AFEC_EnableIt(pAFEC, dwMode)            {\
135                (pAFEC)->AFEC_IER = (dwMode);\
136        }
137
138#define AFEC_DisableIt(pAFEC, dwMode)           {\
139                (pAFEC)->AFEC_IDR = (dwMode);\
140        }
141
142#define AFEC_SetChannelGain(pAFEC,dwMode)       {\
143                (pAFEC)->AFEC_CGR = dwMode;\
144        }
145
146#define AFEC_EnableDataReadyIt(pAFEC)         ((pAFEC)->AFEC_IER = AFEC_IER_DRDY)
147
148#define AFEC_GetStatus(pAFEC)                 ((pAFEC)->AFEC_ISR)
149
150#define AFEC_GetCompareMode(pAFEC)            (((pAFEC)->AFEC_EMR)& (AFEC_EMR_CMPMODE_Msk))
151
152#define AFEC_GetChannelStatus(pAFEC)          ((pAFEC)->AFEC_CHSR)
153
154#define AFEC_GetInterruptMaskStatus(pAFEC)    ((pAFEC)->AFEC_IMR)
155
156#define AFEC_GetLastConvertedData(pAFEC)      ((pAFEC)->AFEC_LCDR)
157
158/*------------------------------------------------------------------------------
159 *         Exported functions
160 *------------------------------------------------------------------------------*/
161extern void AFEC_Initialize(Afec *pAFEC, uint32_t dwId);
162extern uint32_t AFEC_SetClock(Afec *pAFEC, uint32_t dwPres, uint32_t dwMck);
163extern void AFEC_SetTiming(Afec *pAFEC, uint32_t dwStartup,
164                                                        uint32_t dwTracking,
165                                                        uint32_t dwSettling);
166extern void AFEC_SetTrigger(Afec *pAFEC, uint32_t dwTrgSel);
167extern void AFEC_SetAnalogChange(Afec *pAFE, uint8_t bEnDis);
168extern void AFEC_SetSleepMode(Afec *pAFEC, uint8_t bEnDis);
169extern void AFEC_SetFastWakeup(Afec *pAFEC, uint8_t bEnDis);
170extern void AFEC_SetSequenceMode(Afec *pAFEC, uint8_t bEnDis);
171extern void AFEC_SetSequence(Afec *pAFEC, uint32_t dwSEQ1, uint32_t dwSEQ2);
172extern void AFEC_SetSequenceByList(Afec *pAFEC, uint8_t ucChList[],
173                                                                        uint8_t ucNumCh);
174extern void AFEC_SetTagEnable(Afec *pAFEC, uint8_t bEnDis);
175extern void AFEC_SetCompareChannel(Afec *pAFEC, uint32_t dwChannel);
176extern void AFEC_SetCompareMode(Afec *pAFEC, uint32_t dwMode);
177extern void AFEC_SetComparisonWindow(Afec *pAFEC, uint32_t dwHi_Lo);
178extern uint8_t AFEC_CheckConfiguration(Afec *pAFEC, uint32_t dwMcK);
179extern uint32_t AFEC_GetConvertedData(Afec *pAFEC, uint32_t dwChannel);
180extern void AFEC_SetStartupTime(Afec *pAFEC, uint32_t dwUs);
181extern void AFEC_SetTrackingTime(Afec *pAFEC, uint32_t dwNs);
182extern void AFEC_SetAnalogOffset(Afec *pAFE, uint32_t dwChannel,
183                                                                  uint32_t aoffset);
184extern void AFEC_SetAnalogControl(Afec *pAFE, uint32_t control);
185#ifdef __cplusplus
186}
187#endif
188
189#endif /* #ifndef _AFEC_ */
190
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