1 | /* ---------------------------------------------------------------------------- */ |
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2 | /* Atmel Microcontroller Software Support */ |
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3 | /* SAM Software Package License */ |
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4 | /* ---------------------------------------------------------------------------- */ |
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5 | /* Copyright (c) 2015, Atmel Corporation */ |
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6 | /* */ |
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7 | /* All rights reserved. */ |
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8 | /* */ |
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9 | /* Redistribution and use in source and binary forms, with or without */ |
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10 | /* modification, are permitted provided that the following condition is met: */ |
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11 | /* */ |
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12 | /* - Redistributions of source code must retain the above copyright notice, */ |
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13 | /* this list of conditions and the disclaimer below. */ |
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14 | /* */ |
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15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
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16 | /* this software without specific prior written permission. */ |
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17 | /* */ |
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18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
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19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
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20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
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21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
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22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
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23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
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24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
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25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
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26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
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27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
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28 | /* ---------------------------------------------------------------------------- */ |
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29 | |
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30 | /** \addtogroup xdmad_module |
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31 | * |
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32 | * \section Xdma xDma Configuration Usage |
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33 | * |
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34 | * To configure a XDMA channel, the user has to follow these few steps : |
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35 | * <ul> |
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36 | * <li> Initialize a XDMA driver instance by XDMAD_Initialize().</li> |
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37 | * <li> choose an available (disabled) channel using XDMAD_AllocateChannel().</li> |
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38 | * <li> After the XDMAC selected channel has been programmed, |
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39 | * XDMAD_PrepareChannel() is to enable clock and dma peripheral of the DMA, and |
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40 | * set Configuration register to set up the transfer type (memory or non-memory |
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41 | * peripheral for source and destination) and flow control device.</li> |
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42 | * <li> Invoke XDMAD_StartTransfer() to start DMA transfer or |
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43 | * XDMAD_StopTransfer() to force stop DMA transfer.</li> |
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44 | * <li> Once the buffer of data is transferred, XDMAD_IsTransferDone() |
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45 | * checks if DMA transfer is finished.</li> |
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46 | * <li> XDMAD_Handler() handles XDMA interrupt, and invoking XDMAD_SetCallback() |
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47 | * if provided.</li> |
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48 | * </ul> |
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49 | * |
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50 | * Related files:\n |
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51 | * \ref xdmad.h\n |
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52 | * \ref xdmad.c.\n |
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53 | */ |
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54 | |
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55 | /** \file */ |
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56 | |
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57 | /** \addtogroup dmad_functions |
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58 | @{*/ |
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59 | |
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60 | /*---------------------------------------------------------------------------- |
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61 | * Includes |
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62 | *----------------------------------------------------------------------------*/ |
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63 | |
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64 | #include "chip.h" |
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65 | #ifdef __rtems__ |
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66 | #include "../../../utils/utility.h" |
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67 | #include <rtems/irq-extension.h> |
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68 | #include <rtems/sysinit.h> |
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69 | #include <bsp/fatal.h> |
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70 | #endif /* __rtems__ */ |
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71 | #include <assert.h> |
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72 | |
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73 | /*---------------------------------------------------------------------------- |
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74 | * Local functions |
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75 | *----------------------------------------------------------------------------*/ |
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76 | static void XDMAD_Handler(void *arg); |
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77 | /** |
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78 | * \brief Try to allocate a DMA channel for on given controller. |
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79 | * \param pDmad Pointer to DMA driver instance. |
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80 | * \param bSrcID Source peripheral ID, 0xFF for memory. |
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81 | * \param bDstID Destination peripheral ID, 0xFF for memory. |
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82 | * \return Channel number if allocation successful, return |
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83 | * DMAD_ALLOC_FAILED if allocation failed. |
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84 | */ |
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85 | static uint32_t XDMAD_AllocateXdmacChannel(sXdmad *pXdmad, |
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86 | uint8_t bSrcID, |
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87 | uint8_t bDstID) |
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88 | { |
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89 | uint32_t i; |
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90 | |
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91 | /* Can't support peripheral to peripheral */ |
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92 | if (((bSrcID != XDMAD_TRANSFER_MEMORY) |
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93 | && (bDstID != XDMAD_TRANSFER_MEMORY))) |
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94 | return XDMAD_ALLOC_FAILED; |
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95 | |
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96 | /* dma transfer from peripheral to memory */ |
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97 | if (bDstID == XDMAD_TRANSFER_MEMORY) { |
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98 | if ((!XDMAIF_IsValidatedPeripherOnDma(bSrcID))) { |
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99 | TRACE_ERROR("%s:: Allocation failed", __FUNCTION__); |
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100 | return XDMAD_ALLOC_FAILED; |
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101 | } |
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102 | } |
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103 | |
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104 | /* dma transfer from memory to peripheral */ |
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105 | if (bSrcID == XDMAD_TRANSFER_MEMORY) { |
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106 | if ((!XDMAIF_IsValidatedPeripherOnDma(bDstID))) { |
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107 | TRACE_ERROR("%s:: Allocation failed", __FUNCTION__); |
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108 | return XDMAD_ALLOC_FAILED; |
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109 | } |
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110 | } |
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111 | |
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112 | for (i = 0; i < pXdmad->numChannels; i ++) { |
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113 | if (pXdmad->XdmaChannels[i].state == XDMAD_STATE_FREE) { |
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114 | /* Allocate the channel */ |
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115 | pXdmad->XdmaChannels[i].state = XDMAD_STATE_ALLOCATED; |
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116 | /* Get general informations */ |
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117 | pXdmad->XdmaChannels[i].bSrcPeriphID = bSrcID; |
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118 | pXdmad->XdmaChannels[i].bDstPeriphID = bDstID; |
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119 | pXdmad->XdmaChannels[i].bSrcTxIfID = |
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120 | XDMAIF_Get_ChannelNumber(bSrcID, 0); |
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121 | pXdmad->XdmaChannels[i].bSrcRxIfID = |
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122 | XDMAIF_Get_ChannelNumber(bSrcID, 1); |
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123 | pXdmad->XdmaChannels[i].bDstTxIfID = |
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124 | XDMAIF_Get_ChannelNumber(bDstID, 0); |
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125 | pXdmad->XdmaChannels[i].bDstRxIfID = |
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126 | XDMAIF_Get_ChannelNumber(bDstID, 1); |
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127 | return ((i) & 0xFF); |
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128 | } |
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129 | } |
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130 | |
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131 | TRACE_ERROR("%s:: Allocation failed, all channels are occupied", __FUNCTION__); |
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132 | return XDMAD_ALLOC_FAILED; |
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133 | } |
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134 | |
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135 | void XDMAD_DoNothingCallback(uint32_t Channel, void *pArg, uint32_t status) |
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136 | { |
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137 | /* Do nothing */ |
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138 | } |
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139 | |
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140 | /*---------------------------------------------------------------------------- |
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141 | * Exported functions |
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142 | *----------------------------------------------------------------------------*/ |
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143 | |
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144 | sXdmad XDMAD_Instance; |
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145 | |
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146 | static void XDMAD_SysInitialize(void) |
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147 | { |
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148 | sXdmad *pXdmad; |
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149 | uint32_t j; |
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150 | rtems_status_code sc; |
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151 | |
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152 | pXdmad = &XDMAD_Instance; |
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153 | |
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154 | pXdmad->pXdmacs = XDMAC; |
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155 | pXdmad->numControllers = XDMAC_CONTROLLER_NUM; |
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156 | pXdmad->numChannels = (XDMAC_GTYPE_NB_CH(XDMAC_GetType(XDMAC)) + 1); |
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157 | |
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158 | for (j = 0; j < pXdmad->numChannels; j ++) { |
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159 | pXdmad->XdmaChannels[j].fCallback = XDMAD_DoNothingCallback; |
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160 | } |
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161 | |
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162 | sc = rtems_interrupt_handler_install( |
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163 | ID_XDMAC, |
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164 | "XDMA", |
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165 | RTEMS_INTERRUPT_UNIQUE, |
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166 | XDMAD_Handler, |
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167 | pXdmad |
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168 | ); |
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169 | if (sc != RTEMS_SUCCESSFUL) { |
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170 | bsp_fatal(ATSAM_FATAL_XDMA_IRQ_INSTALL); |
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171 | } |
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172 | } |
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173 | |
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174 | RTEMS_SYSINIT_ITEM(XDMAD_SysInitialize, RTEMS_SYSINIT_BSP_START, |
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175 | RTEMS_SYSINIT_ORDER_LAST_BUT_5); |
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176 | |
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177 | |
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178 | /** |
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179 | * \brief Allocate a XDMA channel for upper layer. |
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180 | * \param pXdmad Pointer to xDMA driver instance. |
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181 | * \param bSrcID Source peripheral ID, 0xFF for memory. |
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182 | * \param bDstID Destination peripheral ID, 0xFF for memory. |
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183 | * \return Channel number if allocation successful, return |
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184 | * XDMAD_ALLOC_FAILED if allocation failed. |
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185 | */ |
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186 | uint32_t XDMAD_AllocateChannel(sXdmad *pXdmad, |
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187 | uint8_t bSrcID, |
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188 | uint8_t bDstID) |
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189 | { |
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190 | uint32_t dwChannel = XDMAD_ALLOC_FAILED; |
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191 | uint32_t volatile timer = 0x7FF; |
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192 | |
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193 | LockMutex(pXdmad->xdmaMutex, timer); |
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194 | dwChannel = XDMAD_AllocateXdmacChannel(pXdmad, bSrcID, bDstID); |
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195 | ReleaseMutex(pXdmad->xdmaMutex); |
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196 | |
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197 | return dwChannel; |
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198 | } |
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199 | |
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200 | /** |
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201 | * \brief Free the specified xDMA channel. |
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202 | * \param pXdmad Pointer to xDMA driver instance. |
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203 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
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204 | */ |
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205 | eXdmadRC XDMAD_FreeChannel(sXdmad *pXdmad, |
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206 | uint32_t dwChannel) |
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207 | { |
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208 | uint8_t iChannel = (dwChannel) & 0xFF; |
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209 | assert(pXdmad != NULL); |
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210 | |
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211 | if (iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
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212 | |
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213 | switch (pXdmad->XdmaChannels[iChannel].state) { |
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214 | case XDMAD_STATE_ALLOCATED: |
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215 | case XDMAD_STATE_START: |
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216 | case XDMAD_STATE_IN_XFR: |
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217 | return XDMAD_BUSY; |
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218 | |
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219 | case XDMAD_STATE_DONE: |
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220 | case XDMAD_STATE_HALTED: |
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221 | pXdmad->XdmaChannels[iChannel].state = XDMAD_STATE_FREE; |
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222 | break; |
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223 | } |
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224 | |
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225 | return XDMAD_OK; |
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226 | } |
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227 | |
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228 | /** |
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229 | * \brief Set the callback function for xDMA channel transfer. |
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230 | * \param pXdmad Pointer to xDMA driver instance. |
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231 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
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232 | * \param fCallback Pointer to callback function. |
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233 | * \param pArg Pointer to optional argument for callback. |
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234 | */ |
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235 | eXdmadRC XDMAD_SetCallback(sXdmad *pXdmad, |
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236 | uint32_t dwChannel, |
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237 | XdmadTransferCallback fCallback, |
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238 | void *pArg) |
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239 | { |
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240 | |
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241 | uint8_t iChannel = (dwChannel) & 0xFF; |
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242 | assert(pXdmad != NULL); |
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243 | |
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244 | if (iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
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245 | |
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246 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_FREE) |
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247 | return XDMAD_ERROR; |
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248 | else if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_START) |
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249 | return XDMAD_BUSY; |
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250 | |
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251 | pXdmad->XdmaChannels[iChannel].fCallback = fCallback; |
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252 | pXdmad->XdmaChannels[iChannel].pArg = pArg; |
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253 | |
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254 | return XDMAD_OK; |
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255 | } |
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256 | |
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257 | |
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258 | /** |
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259 | * \brief Enable clock of the xDMA peripheral, Enable the dma peripheral, |
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260 | * configure configuration register for xDMA transfer. |
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261 | * \param pXdmad Pointer to xDMA driver instance. |
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262 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
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263 | * \param dwCfg Configuration value. |
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264 | */ |
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265 | eXdmadRC XDMAD_PrepareChannel(sXdmad *pXdmad, uint32_t dwChannel) |
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266 | { |
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267 | |
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268 | uint8_t iChannel = (dwChannel) & 0xFF; |
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269 | Xdmac *pXdmac = pXdmad->pXdmacs; |
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270 | |
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271 | assert(pXdmad != NULL); |
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272 | |
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273 | if (iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
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274 | |
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275 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_FREE) |
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276 | return XDMAD_ERROR; |
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277 | else if ((pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_START) |
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278 | || (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_IN_XFR)) |
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279 | return XDMAD_BUSY; |
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280 | |
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281 | |
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282 | /* Enable clock of the DMA peripheral */ |
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283 | if (!PMC_IsPeriphEnabled(ID_XDMAC)) |
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284 | PMC_EnablePeripheral(ID_XDMAC); |
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285 | |
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286 | /* Clear dummy status */ |
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287 | XDMAC_GetChannelIsr(pXdmac, iChannel); |
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288 | /* Disables XDMAC interrupt for the given channel. */ |
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289 | XDMAC_DisableGIt (pXdmac, iChannel); |
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290 | XDMAC_DisableChannelIt (pXdmac, iChannel, 0xFF); |
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291 | /* Disable the given dma channel. */ |
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292 | XDMAC_DisableChannel(pXdmac, iChannel); |
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293 | XDMAC_SetSourceAddr(pXdmac, iChannel, 0); |
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294 | XDMAC_SetDestinationAddr(pXdmac, iChannel, 0); |
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295 | XDMAC_SetBlockControl(pXdmac, iChannel, 0); |
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296 | XDMAC_SetChannelConfig(pXdmac, iChannel, 0x20); |
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297 | XDMAC_SetDescriptorAddr(pXdmac, iChannel, 0, 0); |
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298 | XDMAC_SetDescriptorControl(pXdmac, iChannel, 0); |
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299 | return XDMAD_OK; |
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300 | } |
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301 | |
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302 | /** |
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303 | * \brief xDMA interrupt handler |
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304 | * \param arg Pointer to DMA driver instance. |
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305 | */ |
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306 | static void XDMAD_Handler(void *arg) |
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307 | { |
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308 | sXdmad *pDmad; |
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309 | Xdmac *pXdmac; |
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310 | uint32_t xdmaGlobaIntStatus; |
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311 | |
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312 | pDmad = arg; |
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313 | pXdmac = pDmad->pXdmacs; |
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314 | xdmaGlobaIntStatus = XDMAC_GetGIsr(pXdmac) & 0xFFFFFF; |
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315 | |
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316 | while (xdmaGlobaIntStatus != 0) { |
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317 | uint8_t _iChannel; |
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318 | uint32_t xdmaChannelIntStatus; |
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319 | sXdmadChannel *pCh; |
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320 | |
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321 | _iChannel = 31 - __builtin_clz(xdmaGlobaIntStatus); |
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322 | xdmaChannelIntStatus = XDMAC_GetChannelIsr(pXdmac, _iChannel); |
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323 | pCh = &pDmad->XdmaChannels[_iChannel]; |
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324 | |
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325 | xdmaGlobaIntStatus &= ~(UINT32_C(1) << _iChannel); |
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326 | |
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327 | /* Execute callback */ |
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328 | pCh->fCallback(_iChannel, pCh->pArg, xdmaChannelIntStatus); |
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329 | } |
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330 | } |
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331 | |
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332 | |
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333 | /** |
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334 | * \brief Configure DMA for a single transfer. |
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335 | * \param pXdmad Pointer to xDMA driver instance. |
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336 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
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337 | */ |
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338 | eXdmadRC XDMAD_ConfigureTransfer(sXdmad *pXdmad, |
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339 | uint32_t dwChannel, |
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340 | sXdmadCfg *pXdmaParam, |
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341 | uint32_t dwXdmaDescCfg, |
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342 | uint32_t dwXdmaDescAddr, |
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343 | uint32_t dwXdmaIntEn) |
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344 | { |
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345 | uint8_t iChannel = (dwChannel) & 0xFF; |
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346 | |
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347 | assert(pXdmad != NULL); |
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348 | |
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349 | if (iChannel >= pXdmad->numChannels) |
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350 | return XDMAD_ERROR; |
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351 | |
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352 | Xdmac *pXdmac = pXdmad->pXdmacs; |
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353 | XDMAC_GetChannelIsr(pXdmac, iChannel); |
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354 | |
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355 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_FREE) |
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356 | return XDMAD_ERROR; |
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357 | |
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358 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_START) |
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359 | return XDMAD_BUSY; |
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360 | |
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361 | /* Linked List is enabled */ |
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362 | if ((dwXdmaDescCfg & XDMAC_CNDC_NDE) == XDMAC_CNDC_NDE_DSCR_FETCH_EN) { |
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363 | if ((dwXdmaDescCfg & XDMAC_CNDC_NDVIEW_Msk) == XDMAC_CNDC_NDVIEW_NDV0) { |
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364 | XDMAC_SetChannelConfig(pXdmac, iChannel, pXdmaParam->mbr_cfg); |
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365 | XDMAC_SetSourceAddr(pXdmac, iChannel, pXdmaParam->mbr_sa); |
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366 | XDMAC_SetDestinationAddr(pXdmac, iChannel, pXdmaParam->mbr_da); |
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367 | } |
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368 | |
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369 | if ((dwXdmaDescCfg & XDMAC_CNDC_NDVIEW_Msk) == XDMAC_CNDC_NDVIEW_NDV1) |
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370 | XDMAC_SetChannelConfig(pXdmac, iChannel, pXdmaParam->mbr_cfg); |
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371 | |
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372 | XDMAC_SetDescriptorAddr(pXdmac, iChannel, dwXdmaDescAddr, 0); |
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373 | XDMAC_SetDescriptorControl(pXdmac, iChannel, dwXdmaDescCfg); |
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374 | XDMAC_DisableChannelIt (pXdmac, iChannel, 0xFF); |
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375 | XDMAC_EnableChannelIt (pXdmac, iChannel, dwXdmaIntEn); |
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376 | } else { |
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377 | /* LLI is disabled. */ |
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378 | XDMAC_SetSourceAddr(pXdmac, iChannel, pXdmaParam->mbr_sa); |
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379 | XDMAC_SetDestinationAddr(pXdmac, iChannel, pXdmaParam->mbr_da); |
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380 | XDMAC_SetMicroblockControl(pXdmac, iChannel, pXdmaParam->mbr_ubc); |
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381 | XDMAC_SetBlockControl(pXdmac, iChannel, pXdmaParam->mbr_bc); |
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382 | XDMAC_SetDataStride_MemPattern(pXdmac, iChannel, pXdmaParam->mbr_ds); |
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383 | XDMAC_SetSourceMicroBlockStride(pXdmac, iChannel, pXdmaParam->mbr_sus); |
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384 | XDMAC_SetDestinationMicroBlockStride(pXdmac, iChannel, pXdmaParam->mbr_dus); |
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385 | XDMAC_SetChannelConfig(pXdmac, iChannel, pXdmaParam->mbr_cfg); |
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386 | XDMAC_SetDescriptorAddr(pXdmac, iChannel, 0, 0); |
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387 | XDMAC_SetDescriptorControl(pXdmac, iChannel, 0); |
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388 | XDMAC_EnableChannelIt (pXdmac, iChannel, dwXdmaIntEn); |
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389 | } |
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390 | |
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391 | return XDMAD_OK; |
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392 | } |
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393 | |
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394 | /** |
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395 | * \brief Start xDMA transfer. |
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396 | * \param pXdmad Pointer to XDMA driver instance. |
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397 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
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398 | */ |
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399 | eXdmadRC XDMAD_StartTransfer(sXdmad *pXdmad, uint32_t dwChannel) |
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400 | { |
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401 | uint8_t iChannel = (dwChannel) & 0xFF; |
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402 | |
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403 | assert(pXdmad != NULL); |
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404 | |
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405 | if (iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
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406 | |
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407 | Xdmac *pXdmac = pXdmad->pXdmacs; |
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408 | |
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409 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_FREE) { |
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410 | TRACE_ERROR("%s:: XDMAD_STATE_FREE \n\r", __FUNCTION__); |
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411 | return XDMAD_ERROR; |
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412 | } else if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_START) { |
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413 | TRACE_ERROR("%s:: XDMAD_STATE_START \n\r", __FUNCTION__) |
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414 | return XDMAD_BUSY; |
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415 | } |
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416 | |
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417 | /* Change state to transferring */ |
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418 | pXdmad->XdmaChannels[iChannel].state = XDMAD_STATE_START; |
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419 | XDMAC_EnableChannel(pXdmac, iChannel); |
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420 | XDMAC_EnableGIt(pXdmac, iChannel); |
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421 | |
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422 | return XDMAD_OK; |
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423 | } |
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424 | |
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425 | |
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426 | /** |
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427 | * \brief Stop DMA transfer. |
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428 | * \param pDmad Pointer to DMA driver instance. |
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429 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
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430 | */ |
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431 | eXdmadRC XDMAD_StopTransfer(sXdmad *pXdmad, uint32_t dwChannel) |
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432 | { |
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433 | uint8_t _iChannel = (dwChannel) & 0xFF; |
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434 | assert(pXdmad != NULL); |
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435 | |
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436 | if (_iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
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437 | |
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438 | Xdmac *pXdmac = pXdmad->pXdmacs; |
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439 | |
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440 | pXdmad->XdmaChannels[_iChannel].state = XDMAD_STATE_HALTED; |
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441 | /* Disable channel */ |
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442 | XDMAC_DisableChannel(pXdmac, _iChannel); |
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443 | /* Disable interrupts */ |
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444 | XDMAC_DisableChannelIt(pXdmac, _iChannel, 0xFF); |
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445 | /* Clear pending status */ |
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446 | XDMAC_GetChannelIsr(pXdmac, _iChannel); |
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447 | XDMAC_GetGlobalChStatus(pXdmac); |
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448 | return XDMAD_OK; |
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449 | } |
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450 | |
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451 | /**@}*/ |
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452 | |
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