1 | /* ---------------------------------------------------------------------------- */ |
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2 | /* Atmel Microcontroller Software Support */ |
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3 | /* SAM Software Package License */ |
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4 | /* ---------------------------------------------------------------------------- */ |
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5 | /* Copyright (c) 2015, Atmel Corporation */ |
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6 | /* */ |
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7 | /* All rights reserved. */ |
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8 | /* */ |
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9 | /* Redistribution and use in source and binary forms, with or without */ |
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10 | /* modification, are permitted provided that the following condition is met: */ |
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11 | /* */ |
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12 | /* - Redistributions of source code must retain the above copyright notice, */ |
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13 | /* this list of conditions and the disclaimer below. */ |
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14 | /* */ |
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15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
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16 | /* this software without specific prior written permission. */ |
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17 | /* */ |
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18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
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19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
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20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
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21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
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22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
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23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
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24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
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25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
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26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
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27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
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28 | /* ---------------------------------------------------------------------------- */ |
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29 | |
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30 | /** \addtogroup efc_module Working with EEFC |
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31 | * \ingroup peripherals_module |
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32 | * |
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33 | * The EEFC driver provides the interface to configure and use the EEFC |
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34 | * peripheral. |
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35 | * |
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36 | * The user needs to set the number of wait states depending on the frequency |
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37 | * used.\n |
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38 | * Configure number of cycles for flash read/write operations in the FWS field |
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39 | * of EEFC_FMR. |
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40 | * |
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41 | * It offers a function to send flash command to EEFC and waits for the |
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42 | * flash to be ready. |
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43 | * |
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44 | * To send flash command, the user could do in either of following way: |
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45 | * <ul> |
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46 | * <li>Write a correct key, command and argument in EEFC_FCR. </li> |
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47 | * <li>Or, Use IAP (In Application Programming) function which is executed from |
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48 | * ROM directly, this allows flash programming to be done by code running in |
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49 | * flash.</li> |
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50 | * <li>Once the command is achieved, it can be detected even by polling |
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51 | * EEFC_FSR or interrupt. |
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52 | * </ul> |
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53 | * |
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54 | * The command argument could be a page number,GPNVM number or nothing, it |
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55 | * depends on the command itself. Some useful functions in this driver could |
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56 | * help user translate physical flash address into a page number and vice verse. |
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57 | * |
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58 | * For more accurate information, please look at the EEFC section of the |
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59 | * Datasheet. |
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60 | * |
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61 | * Related files :\n |
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62 | * \ref efc.c\n |
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63 | * \ref efc.h.\n |
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64 | */ |
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65 | /*@{*/ |
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66 | /*@}*/ |
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67 | |
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68 | |
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69 | /** |
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70 | * \file |
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71 | * |
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72 | * Implementation of Enhanced Embedded Flash Controller (EEFC). |
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73 | * |
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74 | */ |
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75 | |
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76 | |
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77 | /*---------------------------------------------------------------------------- |
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78 | * Headers |
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79 | *----------------------------------------------------------------------------*/ |
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80 | #include "chip.h" |
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81 | |
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82 | #include <assert.h> |
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83 | |
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84 | |
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85 | /*---------------------------------------------------------------------------- |
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86 | * Macro |
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87 | *----------------------------------------------------------------------------*/ |
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88 | #define EEFC_FCR_FCMD(value) ((EEFC_FCR_FCMD_Msk & ((value) << EEFC_FCR_FCMD_Pos))) |
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89 | |
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90 | /*---------------------------------------------------------------------------- |
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91 | * Exported functions |
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92 | *----------------------------------------------------------------------------*/ |
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93 | |
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94 | extern void EFC_WriteFMR(Efc *efc, uint32_t dwFmr); |
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95 | |
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96 | #ifdef __ICCARM__ |
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97 | extern __ramfunc void EFC_WriteFMR(Efc *efc, uint32_t dwFmr) |
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98 | #else |
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99 | __attribute__ ((section (".ramfunc"))) |
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100 | extern void EFC_WriteFMR(Efc *efc, uint32_t dwFmr) |
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101 | #endif |
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102 | { |
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103 | efc->EEFC_FMR = dwFmr; |
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104 | } |
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105 | |
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106 | /** |
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107 | * \brief Enables the flash ready interrupt source on the EEFC peripheral. |
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108 | * |
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109 | * \param efc Pointer to a Efc instance |
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110 | */ |
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111 | extern void EFC_EnableFrdyIt(Efc *efc) |
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112 | { |
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113 | uint32_t dwFmr; |
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114 | |
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115 | dwFmr = efc->EEFC_FMR |= EEFC_FMR_FRDY; |
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116 | EFC_WriteFMR(efc, dwFmr); |
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117 | } |
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118 | |
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119 | /** |
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120 | * \brief Disables the flash ready interrupt source on the EEFC peripheral. |
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121 | * |
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122 | * \param efc Pointer to a Efc instance |
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123 | */ |
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124 | extern void EFC_DisableFrdyIt(Efc *efc) |
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125 | { |
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126 | uint32_t dwFmr; |
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127 | |
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128 | dwFmr = efc->EEFC_FMR & (~EEFC_FMR_FRDY); |
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129 | EFC_WriteFMR(efc, dwFmr); |
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130 | } |
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131 | |
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132 | |
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133 | /** |
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134 | * \brief Set read/write wait state on the EEFC peripheral. |
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135 | * |
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136 | * \param efc Pointer to a Efc instance |
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137 | * \param cycles the number of wait states in cycle. |
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138 | */ |
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139 | extern void EFC_SetWaitState(Efc *efc, uint8_t ucCycles) |
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140 | { |
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141 | uint32_t dwFmr; |
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142 | |
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143 | dwFmr = efc->EEFC_FMR; |
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144 | dwFmr &= ~((uint32_t)EEFC_FMR_FWS_Msk); |
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145 | dwFmr |= EEFC_FMR_FWS(ucCycles); |
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146 | EFC_WriteFMR(efc, dwFmr); |
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147 | } |
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148 | |
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149 | /** |
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150 | * \brief Returns the current status of the EEFC. |
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151 | * |
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152 | * \note Keep in mind that this function clears the value of some status bits |
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153 | * (LOCKE, PROGE). |
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154 | * |
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155 | * \param efc Pointer to a Efc instance |
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156 | */ |
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157 | extern uint32_t EFC_GetStatus(Efc *efc) |
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158 | { |
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159 | return efc->EEFC_FSR; |
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160 | } |
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161 | |
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162 | /** |
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163 | * \brief Returns the result of the last executed command. |
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164 | * |
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165 | * \param efc Pointer to a Efc instance |
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166 | */ |
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167 | extern uint32_t EFC_GetResult(Efc *efc) |
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168 | { |
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169 | return efc->EEFC_FRR; |
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170 | } |
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171 | |
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172 | /** |
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173 | * \brief Translates the given address page and offset values. |
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174 | * \note The resulting values are stored in the provided variables if they are |
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175 | * not null. |
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176 | * |
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177 | * \param efc Pointer to a Efc instance |
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178 | * \param address Address to translate. |
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179 | * \param pPage First page accessed. |
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180 | * \param pOffset Byte offset in first page. |
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181 | */ |
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182 | extern void EFC_TranslateAddress(Efc **ppEfc, uint32_t dwAddress, |
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183 | uint16_t *pwPage, |
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184 | uint16_t *pwOffset) |
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185 | { |
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186 | assert(dwAddress >= IFLASH_ADDR); |
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187 | assert(dwAddress <= (IFLASH_ADDR + IFLASH_SIZE)); |
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188 | |
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189 | /* Store values */ |
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190 | if (ppEfc) |
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191 | *ppEfc = EFC; |
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192 | |
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193 | if (pwPage) |
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194 | *pwPage = (dwAddress - IFLASH_ADDR) / IFLASH_PAGE_SIZE; |
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195 | |
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196 | if (pwOffset) { |
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197 | *pwOffset = (dwAddress - IFLASH_ADDR) % IFLASH_PAGE_SIZE;; |
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198 | } |
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199 | } |
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200 | |
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201 | |
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202 | /** |
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203 | * \brief Computes the address of a flash access given the page and offset. |
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204 | * |
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205 | * \param efc Pointer to a Efc instance |
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206 | * \param page Page number. |
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207 | * \param offset Byte offset inside page. |
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208 | * \param pAddress Computed address (optional). |
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209 | */ |
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210 | extern void EFC_ComputeAddress(Efc *efc, uint16_t wPage, uint16_t wOffset, |
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211 | uint32_t *pdwAddress) |
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212 | { |
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213 | uint32_t dwAddress; |
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214 | |
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215 | /* Stop warning */ |
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216 | efc = efc; |
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217 | |
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218 | assert(efc); |
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219 | assert(wPage <= IFLASH_NB_OF_PAGES); |
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220 | assert(wOffset < IFLASH_PAGE_SIZE); |
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221 | dwAddress = IFLASH_ADDR + wPage * IFLASH_PAGE_SIZE + wOffset; |
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222 | |
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223 | /* Store result */ |
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224 | if (pdwAddress != NULL) |
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225 | *pdwAddress = dwAddress; |
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226 | } |
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227 | |
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228 | /** |
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229 | * \brief Performs the given command and wait until its completion (or an error). |
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230 | * |
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231 | * \param efc Pointer to a Efc instance |
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232 | * \param command Command to perform. |
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233 | * \param argument Optional command argument. |
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234 | * |
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235 | * \return 0 if successful, otherwise returns an error code. |
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236 | */ |
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237 | |
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238 | extern uint32_t EFC_PerformCommand(Efc *efc, uint32_t dwCommand, |
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239 | uint32_t dwArgument, uint32_t dwUseIAP) |
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240 | { |
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241 | if (dwUseIAP != 0) { |
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242 | /* Pointer on IAP function in ROM */ |
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243 | static uint32_t (*IAP_PerformCommand)(uint32_t, uint32_t); |
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244 | |
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245 | IAP_PerformCommand = (uint32_t (*)(uint32_t, uint32_t)) |
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246 | * ((uint32_t *)CHIP_FLASH_IAP_ADDRESS); |
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247 | |
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248 | if (efc == EFC) { |
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249 | IAP_PerformCommand(0, EEFC_FCR_FKEY_PASSWD | EEFC_FCR_FARG(dwArgument) |
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250 | | EEFC_FCR_FCMD(dwCommand)); |
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251 | } |
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252 | |
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253 | return (efc->EEFC_FSR & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE | EEFC_FSR_FLERR)); |
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254 | } else { |
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255 | uint32_t dwStatus; |
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256 | |
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257 | efc->EEFC_FCR = EEFC_FCR_FKEY_PASSWD | EEFC_FCR_FARG(dwArgument) |
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258 | | EEFC_FCR_FCMD(dwCommand); |
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259 | |
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260 | do { |
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261 | dwStatus = efc->EEFC_FSR; |
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262 | } while ((dwStatus & EEFC_FSR_FRDY) != EEFC_FSR_FRDY); |
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263 | |
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264 | return (dwStatus & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE | EEFC_FSR_FLERR)); |
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265 | } |
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266 | } |
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267 | |
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268 | /** |
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269 | * \brief Set flash access mode. |
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270 | * |
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271 | * \param dwMode - 0:128-bit, (1<<24):64-bit |
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272 | */ |
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273 | extern void EFC_SetFlashAccessMode(Efc *efc, uint32_t dwMode) |
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274 | { |
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275 | uint32_t dwFmr; |
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276 | |
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277 | dwFmr = dwMode; |
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278 | EFC_WriteFMR(efc, dwFmr); |
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279 | } |
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280 | |
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