source: rtems/bsps/arm/atsam/contrib/libraries/libboard/include/s25fl1.h @ 54aabb7

5
Last change on this file since 54aabb7 was 54aabb7, checked in by Sebastian Huber <sebastian.huber@…>, on 04/22/18 at 13:11:43

bsp/atsam: Move libraries to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 9.4 KB
Line 
1/* ---------------------------------------------------------------------------- */
2/*                  Atmel Microcontroller Software Support                      */
3/*                       SAM Software Package License                           */
4/* ---------------------------------------------------------------------------- */
5/* Copyright (c) 2015, Atmel Corporation                                        */
6/*                                                                              */
7/* All rights reserved.                                                         */
8/*                                                                              */
9/* Redistribution and use in source and binary forms, with or without           */
10/* modification, are permitted provided that the following condition is met:    */
11/*                                                                              */
12/* - Redistributions of source code must retain the above copyright notice,     */
13/* this list of conditions and the disclaimer below.                            */
14/*                                                                              */
15/* Atmel's name may not be used to endorse or promote products derived from     */
16/* this software without specific prior written permission.                     */
17/*                                                                              */
18/* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
19/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
20/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */
21/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,      */
22/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
23/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */
24/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */
25/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */
26/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
27/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
28/* ---------------------------------------------------------------------------- */
29
30/**
31 * \file
32 *
33 * Interface for the S25fl1 Serial Flash driver.
34 *
35 */
36
37#ifndef S25FL1_H
38#define S25FL1_H
39#define USE_QSPI_DMA
40/*----------------------------------------------------------------------------
41 *        Macros
42 *----------------------------------------------------------------------------*/
43
44#define Size(pAt25)            ((pAt25)->pDesc->size)
45#define PageSize(pAt25)        ((pAt25)->pDesc->pageSize)
46#define BlockSize(pAt25)       ((pAt25)->pDesc->blockSize)
47#define Name(pAt25)            ((pAt25)->pDesc->name)
48#define ManId(pAt25)           (((pAt25)->pDesc->jedecId) & 0xFF)
49#define PageNumber(pAt25)      (Size(pAt25) / PageSize(pAt25))
50#define BlockNumber(pAt25)     (Size(pAt25) / BlockSize(pAt25))
51#define PagePerBlock(pAt25)    (BlockSize(pAt25) / PageSize(pAt25))
52#define BlockEraseCmd(pAt25)   ((pAt25)->pDesc->blockEraseCmd)
53
54/*----------------------------------------------------------------------------
55 *        Local definitions
56 *----------------------------------------------------------------------------*/
57
58/** Device is protected, operation cannot be carried out. */
59#define ERROR_PROTECTED        1
60/** Device is busy executing a command. */
61#define ERROR_BUSY             2
62/** There was a problem while trying to program page data. */
63#define ERROR_PROGRAM          3
64/** There was an SPI communication error. */
65#define ERROR_SPI              4
66
67/** Device ready/busy status bit. */
68#define STATUS_RDYBSY          (1 << 0)
69/** Device is ready. */
70#define STATUS_RDYBSY_READY    (0 << 0)
71/** Device is busy with internal operations. */
72#define STATUS_RDYBSY_BUSY     (1 << 0)
73/** Write enable latch status bit. */
74#define STATUS_WEL             (1 << 1)
75/** Device is not write enabled. */
76#define STATUS_WEL_DISABLED    (0 << 1)
77/** Device is write enabled. */
78#define STATUS_WEL_ENABLED     (1 << 1)
79/** Software protection status bit-field. */
80#define STATUS_SWP             (3 << 2)
81/** All sectors are software protected. */
82#define STATUS_SWP_PROTALL     (3 << 2)
83/** Some sectors are software protected. */
84#define STATUS_SWP_PROTSOME    (1 << 2)
85/** No sector is software protected. */
86#define STATUS_SWP_PROTNONE    (0 << 2)
87/** Write protect pin status bit. */
88#define STATUS_WPP             (1 << 4)
89/** Write protect signal is not asserted. */
90#define STATUS_WPP_NOTASSERTED (0 << 4)
91/** Write protect signal is asserted. */
92#define STATUS_WPP_ASSERTED    (1 << 4)
93/** Erase/program error bit. */
94#define STATUS_EPE             (1 << 5)
95/** Erase or program operation was successful. */
96#define STATUS_EPE_SUCCESS     (0 << 5)
97/** Erase or program error detected. */
98#define STATUS_EPE_ERROR       (1 << 5)
99/** Sector protection registers locked bit. */
100#define STATUS_SPRL            (1 << 7)
101/** Sector protection registers are unlocked. */
102#define STATUS_SPRL_UNLOCKED   (0 << 7)
103/** Sector protection registers are locked. */
104#define STATUS_SPRL_LOCKED     (1 << 7)
105
106/** Quad enable bit */
107#define STATUS_QUAD_ENABLE     (1 << 1)
108/** Quad enable bit */
109#define STATUS_WRAP_ENABLE     (0 << 4)
110
111/** Latency control bits */
112#define STATUS_LATENCY_CTRL    (0xF << 0)
113
114#define STATUS_WRAP_BYTE       (1 << 5)
115
116#define BLOCK_PROTECT_Msk      (7 << 2)
117
118#define TOP_BTM_PROTECT_Msk    (1 << 5)
119
120#define SEC_PROTECT_Msk        (1 << 6)
121
122#define CHIP_PROTECT_Msk       (0x1F << 2)
123
124/** Read array command code. */
125#define READ_ARRAY             0x0B
126/** Read array (low frequency) command code. */
127#define READ_ARRAY_LF          0x03
128/** Fast Read array  command code. */
129#define READ_ARRAY_DUAL        0x3B
130/** Fast Read array  command code. */
131#define READ_ARRAY_QUAD        0x6B
132/** Fast Read array  command code. */
133#define READ_ARRAY_DUAL_IO     0xBB
134/** Fast Read array  command code. */
135#define READ_ARRAY_QUAD_IO     0xEB
136/** Block erase command code (4K block). */
137#define BLOCK_ERASE_4K         0x20
138/** Block erase command code (32K block). */
139#define BLOCK_ERASE_32K        0x52
140/** Block erase command code (64K block). */
141#define BLOCK_ERASE_64K        0xD8
142/** Chip erase command code 1. */
143#define CHIP_ERASE_1           0x60
144/** Chip erase command code 2. */
145#define CHIP_ERASE_2           0xC7
146/** Byte/page program command code. */
147#define BYTE_PAGE_PROGRAM      0x02
148/** Sequential program mode command code 1. */
149#define SEQUENTIAL_PROGRAM_1   0xAD
150/** Sequential program mode command code 2. */
151#define SEQUENTIAL_PROGRAM_2   0xAF
152/** Write enable command code. */
153#define WRITE_ENABLE           0x06
154/** Write disable command code. */
155#define WRITE_DISABLE          0x04
156/** Protect sector command code. */
157#define PROTECT_SECTOR         0x36
158/** Unprotected sector command code. */
159#define UNPROTECT_SECTOR       0x39
160/** Read sector protection registers command code. */
161#define READ_SECTOR_PROT       0x3C
162/** Read status register command code. */
163#define READ_STATUS_1          0x05
164/** Read status register command code. */
165#define READ_STATUS_2          0x35
166/** Read status register command code. */
167#define READ_STATUS_3          0x33
168/** Write status register command code. */
169#define WRITE_STATUS           0x01
170/** Read manufacturer and device ID command code. */
171#define READ_JEDEC_ID          0x9F
172/** Deep power-down command code. */
173#define DEEP_PDOWN             0xB9
174/** Resume from deep power-down command code. */
175#define RES_DEEP_PDOWN         0xAB
176/** Resume from deep power-down command code. */
177#define SOFT_RESET_ENABLE      0x66
178/** Resume from deep power-down command code. */
179#define SOFT_RESET             0x99
180/** Resume from deep power-down command code. */
181#define WRAP_ENABLE            0x77
182/** Continuous Read Mode Reset command code. */
183#define CONT_MODE_RESET        0xFF
184
185/** SPI Flash Manufacturer JEDEC ID */
186#define ATMEL_SPI_FLASH             0x1F
187#define ST_SPI_FLASH                0x20
188#define WINBOND_SPI_FLASH           0xEF
189#define MACRONIX_SPI_FLASH          0xC2
190#define SST_SPI_FLASH               0xBF
191
192/*----------------------------------------------------------------------------
193 *        Exported functions
194 *----------------------------------------------------------------------------*/
195
196uint32_t S25FL1D_ReadJedecId(void);
197
198void S25FL1D_InitFlashInterface(uint8_t Mode);
199
200void S25FL1D_SoftReset(void);
201
202void S25FL1D_ContReadModeReset(void);
203unsigned char S25FL1D_Unprotect(void);
204
205unsigned char S25FL1D_Protect(uint32_t StartAddr, uint32_t Size);
206
207void S25FL1D_QuadMode(uint8_t Enable);
208
209void S25FL1D_EnableWrap(uint8_t ByetAlign);
210
211void S25FL1D_SetReadLatencyControl(uint8_t Latency);
212
213unsigned char S25FL1D_EraseChip(void);
214
215unsigned char S25FL1D_EraseSector(unsigned int address);
216
217unsigned char S25FL1D_Erase64KBlock(unsigned int address);
218
219unsigned char S25FL1D_Write(
220        uint32_t *pData,
221        uint32_t size,
222        uint32_t address,
223        uint8_t Secure);
224
225extern unsigned char S25FL1D_Read(
226        uint32_t *pData,
227        uint32_t size,
228        uint32_t address);
229
230extern unsigned char S25FL1D_ReadDual(
231        uint32_t *pData,
232        uint32_t size,
233        uint32_t address);
234
235extern unsigned char S25FL1D_ReadQuad(
236        uint32_t *pData,
237        uint32_t size,
238        uint32_t address);
239
240extern unsigned char S25FL1D_ReadDualIO(
241        uint32_t *pData,
242        uint32_t size,
243        uint32_t address,
244        uint8_t ContMode,
245        uint8_t Secure);
246
247extern unsigned char S25FL1D_ReadQuadIO(
248        uint32_t *pData,
249        uint32_t size,
250        uint32_t address,
251        uint8_t ContMode,
252        uint8_t Secure);
253
254#endif // #ifndef S25FL1_H
255
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