1 | Board support package for the Atmel SAM V71/V70/E70/S70 chip platform. |
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2 | |
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3 | The BSP is customized to a particular board/chip variant by means of configure |
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4 | command line options. |
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5 | |
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6 | Use --enable-chip=XYZ to select the chip variant where XYZ is one of same70j19, |
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7 | same70j20, same70j21, same70n19, same70n20, same70n21, same70q19, same70q20, |
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8 | same70q21, sams70j19, sams70j20, sams70j21, sams70n19, sams70n20, sams70n21, |
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9 | sams70q19, sams70q20, sams70q21, samv71j19, samv71j20, samv71j21, samv71n19, |
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10 | samv71n20, samv71n21, samv71q19, samv71q20 and samv71q21. By default the BSP |
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11 | uses the ATSAMV71Q21 chip. Not all variants are tested. |
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12 | |
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13 | Use --enable-sdram=XYZ to select the SDRAM variant where XYZ is one of |
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14 | is42s16100e-7bli and is42s16320f-7bl. Not all variants are tested with all |
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15 | controller and speed combinations. |
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16 | |
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17 | Use BOARD_MAINOSC=XYZ to set the main oscillator frequency in Hz (default |
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18 | 12MHz). |
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19 | |
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20 | Use ATSAM_MCK=XYZ to set the MCK frequency that should be used. The default case |
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21 | (123000000) enables operation of an external SDRAM on the SAMv71 Explained |
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22 | evaluation kit. Some other configurations (e.g. 150MHz) would be too fast on |
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23 | that board. |
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24 | |
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25 | Your application can also overwrite the clock settings. If you have a |
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26 | bootloader with one setting in your internal flash and an application with |
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27 | another setting in your external SDRAM, you should also use the |
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28 | ATSAM_CHANGE_CLOCK_FROM_SRAM=1 option. To overwrite the clock settings, define |
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29 | the following structures in your application: |
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30 | |
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31 | -------- |
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32 | const struct atsam_clock_config atsam_clock_config = { |
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33 | .pllar_init = my_custom_pllar_value, |
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34 | .mckr_init = my_custom_mckr_value, |
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35 | .mck_freq = my_resulting_mck_frequency |
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36 | }; |
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37 | |
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38 | const struct BOARD_Sdram_Config BOARD_Sdram_Config = { |
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39 | .sdramc_tr = my_custom_sdramc_tr_value, |
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40 | .sdramc_cr = my_custom_sdramc_cr_value, |
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41 | .sdramc_mdr = my_custom_sdramc_mdr_value, |
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42 | .sdramc_cfr1 = my_custom_sdramc_cfr1_value |
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43 | }; |
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44 | -------- |
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45 | |
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46 | Use ATSAM_SLOWCLOCK_USE_XTAL=0 to disable the usage of the external 32kHz |
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47 | oscillator for the slow clock. This is useful for example for the SAM E70 |
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48 | Xplained kit. |
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49 | |
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50 | Use ATSAM_CONSOLE_BAUD=XYZ to set the initial baud for console devices (default |
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51 | 115200). |
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52 | |
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53 | Use ATSAM_CONSOLE_DEVICE_TYPE=XYZ to set the device type for /dev/console, use |
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54 | 0 for USART and 1 for UART (default USART). |
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55 | |
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56 | Use ATSAM_CONSOLE_DEVICE_INDEX=XYZ to set the device index for /dev/console |
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57 | (default 1, e.g. USART1). |
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58 | |
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59 | Use ATSAM_CONSOLE_USE_INTERRUPTS=XYZ to set the use interrupt driven mode for |
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60 | console devices (used by default). |
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61 | |
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62 | Use ATSAM_MEMORY_TCM_SIZE=XYZ to set the size of tightly coupled memories (TCM) |
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63 | in bytes (default 0x00000000). |
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64 | |
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65 | Use ATSAM_MEMORY_INTFLASH_SIZE=XYZ to set the size of internal flash in bytes |
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66 | (default is derived from chip variant). |
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67 | |
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68 | Use ATSAM_MEMORY_INTSRAM_SIZE=XYZ to set the size of internal SRAM in bytes |
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69 | (default is derived from chip variant). |
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70 | |
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71 | Use ATSAM_MEMORY_SDRAM_SIZE=XYZ to set the size of external SDRAM in bytes |
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72 | (default 0x00200000). |
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73 | |
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74 | Use ATSAM_MEMORY_QSPIFLASH_SIZE=XYZ to set the size of QSPI flash in bytes |
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75 | (default 0x00200000). |
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76 | |
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77 | The pins may be configured by the application at link-time. See |
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78 | <bsp/pin-config.h>. |
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79 | |
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80 | The clock driver uses the ARMv7-M Systick. |
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81 | |
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82 | The console driver supports the USART and UART devices. |
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83 | |
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84 | The default linker command file places the code into the internal flash. Use |
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85 | "LDFLAGS += -qnolinkcmds -T linkcmds.sdram" to place the code into the external |
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86 | SDRAM. Use "LDFLAGS += -qnolinkcmds -T linkcmds.intsram" to place the code |
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87 | into the internal SRAM. |
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88 | |
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89 | The fast text section uses the ITCM. The fast data section uses the DTCM. |
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90 | |
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91 | Data and instruction cache are enabled during system start. The RTEMS cache |
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92 | manager is supported with exception of the freeze functions. |
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