source: rtems/bsps/arm/atsam/README

Last change on this file was eb36d11, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 25, 2018 at 1:06:08 PM

bsps: Move documentation, etc. files to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 3.6 KB
Line 
1Board support package for the Atmel SAM V71/V70/E70/S70 chip platform.
2
3The BSP is customized to a particular board/chip variant by means of configure
4command line options.
5
6Use --enable-chip=XYZ to select the chip variant where XYZ is one of same70j19,
7same70j20, same70j21, same70n19, same70n20, same70n21, same70q19, same70q20,
8same70q21, sams70j19, sams70j20, sams70j21, sams70n19, sams70n20, sams70n21,
9sams70q19, sams70q20, sams70q21, samv71j19, samv71j20, samv71j21, samv71n19,
10samv71n20, samv71n21, samv71q19, samv71q20 and samv71q21.  By default the BSP
11uses the ATSAMV71Q21 chip.  Not all variants are tested.
12
13Use --enable-sdram=XYZ to select the SDRAM variant where XYZ is one of
14is42s16100e-7bli and is42s16320f-7bl. Not all variants are tested with all
15controller and speed combinations.
16
17Use BOARD_MAINOSC=XYZ to set the main oscillator frequency in Hz (default
1812MHz).
19
20Use ATSAM_MCK=XYZ to set the MCK frequency that should be used. The default case
21(123000000) enables operation of an external SDRAM on the SAMv71 Explained
22evaluation kit. Some other configurations (e.g. 150MHz) would be too fast on
23that board.
24
25Your application can also overwrite the clock settings.  If you have a
26bootloader with one setting in your internal flash and an application with
27another setting in your external SDRAM, you should also use the
28ATSAM_CHANGE_CLOCK_FROM_SRAM=1 option. To overwrite the clock settings, define
29the following structures in your application:
30
31--------
32const struct atsam_clock_config atsam_clock_config = {
33  .pllar_init = my_custom_pllar_value,
34  .mckr_init = my_custom_mckr_value,
35  .mck_freq = my_resulting_mck_frequency
36};
37
38const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
39  .sdramc_tr = my_custom_sdramc_tr_value,
40  .sdramc_cr = my_custom_sdramc_cr_value,
41  .sdramc_mdr = my_custom_sdramc_mdr_value,
42  .sdramc_cfr1 = my_custom_sdramc_cfr1_value
43};
44--------
45
46Use ATSAM_SLOWCLOCK_USE_XTAL=0 to disable the usage of the external 32kHz
47oscillator for the slow clock. This is useful for example for the SAM E70
48Xplained kit.
49
50Use ATSAM_CONSOLE_BAUD=XYZ to set the initial baud for console devices (default
51115200).
52
53Use ATSAM_CONSOLE_DEVICE_TYPE=XYZ to set the device type for /dev/console, use
540 for USART and 1 for UART (default USART).
55
56Use ATSAM_CONSOLE_DEVICE_INDEX=XYZ to set the device index for /dev/console
57(default 1, e.g. USART1).
58
59Use ATSAM_CONSOLE_USE_INTERRUPTS=XYZ to set the use interrupt driven mode for
60console devices (used by default).
61
62Use ATSAM_MEMORY_TCM_SIZE=XYZ to set the size of tightly coupled memories (TCM)
63in bytes (default 0x00000000).
64
65Use ATSAM_MEMORY_INTFLASH_SIZE=XYZ to set the size of internal flash in bytes
66(default is derived from chip variant).
67
68Use ATSAM_MEMORY_INTSRAM_SIZE=XYZ to set the size of internal SRAM in bytes
69(default is derived from chip variant).
70
71Use ATSAM_MEMORY_SDRAM_SIZE=XYZ to set the size of external SDRAM in bytes
72(default 0x00200000).
73
74Use ATSAM_MEMORY_QSPIFLASH_SIZE=XYZ to set the size of QSPI flash in bytes
75(default 0x00200000).
76
77The pins may be configured by the application at link-time.  See
78<bsp/pin-config.h>.
79
80The clock driver uses the ARMv7-M Systick.
81
82The console driver supports the USART and UART devices.
83
84The default linker command file places the code into the internal flash.  Use
85"LDFLAGS += -qnolinkcmds -T linkcmds.sdram" to place the code into the external
86SDRAM.  Use "LDFLAGS += -qnolinkcmds -T linkcmds.intsram" to place the code
87into the internal SRAM.
88
89The fast text section uses the ITCM.  The fast data section uses the DTCM.
90
91Data and instruction cache are enabled during system start.  The RTEMS cache
92manager is supported with exception of the freeze functions.
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