source: rtems/bsps/arm/altera-cyclone-v/include/bsp.h @ 3454179

5
Last change on this file since 3454179 was 3454179, checked in by Sebastian Huber <sebastian.huber@…>, on Feb 5, 2018 at 12:54:48 PM

bsp/altera-cyclone-v: Add device tree support

Update #3290.

  • Property mode set to 100644
File size: 1.1 KB
RevLine 
[f73cfe99]1/*
[3454179]2 * Copyright (c) 2013, 2018 embedded brains GmbH.  All rights reserved.
[f73cfe99]3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
[c499856]12 * http://www.rtems.org/license/LICENSE.
[f73cfe99]13 */
14
[8aa967c]15#ifndef LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H
16#define LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H
[f73cfe99]17
18#include <bspopts.h>
19
20#define BSP_FEATURE_IRQ_EXTENSION
21
[3454179]22#define BSP_FDT_IS_SUPPORTED
23
[f73cfe99]24#ifndef ASM
25
26#include <rtems.h>
27
28#include <bsp/default-initial-extension.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif /* __cplusplus */
33
34#define BSP_ARM_A9MPCORE_SCU_BASE 0xFFFEC000
35
36#define BSP_ARM_GIC_CPUIF_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000100 )
37
38#define BSP_ARM_A9MPCORE_GT_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000200 )
39
40#define BSP_ARM_GIC_DIST_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00001000 )
41
[f2fed0c1]42#define BSP_ARM_L2C_310_BASE 0xfffef000
43
44#define BSP_ARM_L2C_310_ID 0x410000c9
[f73cfe99]45
46#ifdef __cplusplus
47}
48#endif /* __cplusplus */
49
50#endif /* ASM */
51
[8aa967c]52#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H */
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